2 Single-Event Effects

The primary concern of interest for the ADC3664-SEP is the robustness against Single-Event Latch-up (SEL) and Single -Event Functional Interrupt (SEFI)

In CMOS technologies, such as the TI 65nm CMOS (C021) process used on the ADC3664-SEP, the CMOS circuitry introduces a potential for SEL susceptibility. SEL can occur if excess current injection caused by the passage of an energetic ion is high enough to trigger the formation of a parasitic cross-coupled PNP and NPN bipolar structure (formed between the p-sub and n-well and n+ and p+ contacts) [1, 2]. The parasitic bipolar structure initiated by a single-event creates a high-conductance path, which induces a steady-state current that is typically orders-of-magnitude higher than the normal operating current). This current between power and ground persists or is latched until power is removed, the device is reset, or until the device is destroyed by the high-current state. The ADC3664-SEP was tested for SEL at above the maximum recommended voltage at 1.9V. The device exhibits no SEL with heavy-ions up to LET_EFF = 51 MeV × cm²/ mg at flux approximately 10⁵ ions / cm²× s, fluence of approximately 10⁷ ions / cm², and a die temperature of 125°C, using Pr.

The ADC3664-SEP was characterized for SETs at fluxes up to 10⁵ ions / cm²× s and with a fluence between 10⁵ ions / cm²and 10⁷ ions/cm² per run, at room temperature. The ADC3664-SEP is SEFI-free (no power-cycle events).