SBAK047 March 2025 ADC3664-SEP
The ADC3664-SEP is a low latency, low noise, and ultra low power, 14-bit, 125MSPS, high-speed dual channel ADC. Designed for best noise performance, the device delivers a noise spectral density of – 156.9dBFS/Hz combined with excellent linearity and dynamic range. The ADC3664-SEP offers DC precision together with IF sampling support to enable the design of a wide range of applications. The low latency architecture (as low as 1 clock cycle latency) and high sample rate also enable high speed control loops. The ADC consumes only 100mW/ch at 125MSPS and the power consumption scales well with sampling rate.
The device uses a serial LVDS (SLVDS) interface to output the data which minimizes the number of digital interconnects. The device also integrates a digital down converter (DDC) to help reduce the data rate and lower system power consumption. The ADC3664-SEP is pinto-pin compatible with a family of 16-bit resolution ADCs.
| Description (1) | Device Information |
|---|---|
| Generic Part Number | ADC3664-SEP |
| Orderable Part Number | ADC3664-SEP |
| Device Function | Low-Noise Dual 14-Bit 125MSPS ADC |
| Device Package | 40-pin VQFN RSB (5 × 5mm) |
| Technology | TI C021 65nm CMOS |
| Exposure Facility | Radiation Effects Facility Cyclotron Institute, Texas A&M University (15MeV / Nucleon) |
| Heavy Ion Fluence per run | Up to 1 × 107 ions/cm2 |
| Irradiation Temperature | 25°C (for SET testing) and 125°C (for SEL testing) |