ZHCSGC2I June 2017 – March 2024 UCC5310 , UCC5320 , UCC5350 , UCC5390
PRODUCTION DATA
- 1
- 1 特性
- 2 應用
- 3 說明
- 4 Device Comparison Table
- 5 Pin Configuration and Function
-
6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Thermal Information
- 6.5 Power Ratings
- 6.6 Insulation Specifications for D Package
- 6.7 Insulation Specifications for DWV Package
- 6.8 Safety-Related Certifications For D Package
- 6.9 Safety-Related Certifications For DWV Package
- 6.10 Safety Limiting Values
- 6.11 Electrical Characteristics
- 6.12 Switching Characteristics
- 6.13 Insulation Characteristics Curves
- 6.14 Typical Characteristics
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Revision History
- 14Mechanical, Packaging, and Orderable Information
封裝選項
機械數(shù)據(jù) (封裝 | 引腳)
散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)
訂購信息
5 Pin Configuration and Function
Figure 5-1 UCC5320S, UCC5350SB, and UCC5390S
8-Pin SOICTop
View
Figure 5-2 UCC5310M and UCC5350M
8-Pin SOICTop
View
Figure 5-3 UCC5320E and UCC5390E
8-Pin SOICTop
ViewTable 5-1 Pin Functions
| PIN | TYPE(1) | DESCRIPTION | |||
|---|---|---|---|---|---|
| NAME | NO. | ||||
| UCC53x0S | UCC53x0M | UCC53x0E | |||
| CLAMP | — | 7 | — | I | Active Miller-clamp input found on the UCC53x0M used to prevent false turnon of the power switches. |
| GND1 | 4 | 4 | 4 | G | Input ground. All signals on the input side are referenced to this ground. |
| GND2 | — | — | 7 | G | Gate-drive common pin. Connect this pin to the IGBT emitter. UVLO referenced to GND2 in the UCC53x0E. |
| IN+ | 2 | 2 | 2 | I | Noninverting gate-drive voltage-control input. The IN+ pin has a CMOS input threshold. This pin is pulled low internally if left open. Use Table 8-4 to understand the input and output logic of these devices. |
| IN– | 3 | 3 | 3 | I | Inverting gate-drive voltage control input. The IN– pin has a CMOS input threshold. This pin is pulled high internally if left open. Use Table 8-4 to understand the input and output logic of these devices. |
| OUT | — | 6 | 6 | O | Gate-drive output for UCC53x0E and UCC53x0M versions. |
| OUTH | 6 | — | — | O | Gate-drive pull-up output found on the UCC53x0S. |
| OUTL | 7 | — | — | O | Gate-drive pull-down output found on the UCC53x0S. |
| VCC1 | 1 | 1 | 1 | P | Input supply voltage. Connect a locally decoupled capacitor to GND. Use a low-ESR or ESL capacitor located as close to the device as possible. |
| VCC2 | 5 | 5 | 5 | P | Positive output supply rail. Connect a locally decoupled capacitor to VEE2. Use a low-ESR or ESL capacitor located as close to the device as possible. |
| VEE2 | 8 | 8 | 8 | P | Negative output supply rail for E version, and GND for S and M versions. Connect a locally decoupled capacitor to GND2 for E version. Use a low-ESR or ESL capacitor located as close to the device as possible. |
(1) P = Power, G = Ground, I = Input, O = Output