Table 1. Design Parameters

9.2.1.2.1 Power Handling Curves

The application curves give the maximum input power that can be handled by the device versus the ambient temperature. Two input curves are shown below. The first refers to a wide-range input voltage (88 V_AC; 264 V_AC) converter; the second refers to a European range input voltage (175 V_AC; 265 V_AC) converter. The two curves refer to an AC / DC converter realized with the UCC28910 device using the provided design equations. A copper area, used as heat sink, connected to GND terminals, considered in calculation to get the Input curves is 560 mm². The input stage losses are included. A full-bridge rectifier and 7.5 Ω as inrush limiter resistance was considered.

To estimate the maximum output power at a certain ambient temperature it is possible to multiply the input power given by the input curve by the estimated efficiency. Below are reported the output power curves where, as estimated efficiency, was considered the minimum required efficiency given by EPA in to the Eligible Criteria (Version 2.0) for single voltage external AC/DC power supplies to get energy star label.

The curves give a rough estimation of the power handling capability of the device because at the end this capability depends a lot from the other components used in the circuit. A big impact on efficiency and then, on power handling capability, is given by transformer. The primary-leakage inductance and primary-winding parasitic capacitance should be minimized to improve performance.

The output diode has also an important impact; better performance is generally obtained if a Schottky diode is used because of the low-forward voltage drop and fast switching times. The reverse leakage current of this diode has to be checked because this current, in the schottky diodes, is higher respect standard or fast diodes. It increases with temperature. If the revers current is too high it could cause thermal runaway of the diode beside of the additional losses. Considering the wide-range application (Figure 30) the point representing the required output power (6 W) and operating maximum T_A (50°C) is below the 5-V curve so the device can handle the required power at the required condition.

Figure 28. (90; 265) V_RMS Input Voltage Range Converter Maximum Input Power vs Ambient Temperature

Figure 30. (90; 265) V_RMS Input Voltage Range Converter Maximum Output Power vs Ambient Temperature

Figure 29. (180; 265) V_RMS Input Voltage Range Converter Maximum Input Power vs Ambient Temperature

Figure 31. (180; 265) V_RMS Input Voltage Range Converter Maximum Output Power vs Ambient Temperature

9.2.1.2.2 Definition of Terms

Capacitance Terms in Farads

• C_BULK: total input capacitance of C_B1 and C_B2.
• C_VDD: capacitance on the VDD terminal.
• C_OUT: output capacitance.

Duty Cycle Terms

• K_CC: secondary diode conduction duty cycle in CC, (see Electrical Characteristics).
• D_MAX: MOSFET on-time maximum duty cycle.

Frequency Terms in Hertz

• f_LINE: minimum line frequency.
• f_TARGET(max): target full-load maximum switching frequency of the converter.
• f_MIN: minimum switching frequency of the converter, add 15% margin over the f_SW(min) limit of the device.
• f_SW(min): minimum switching frequency (see Electrical Characteristics)

Current Terms in Amperes

• I_OCC: converter output current target when operating in constant current mode.
• I_{D_PK(max)}: maximum transformer primary current peak.
• I_TRAN: required positive load-step current.
• I_RUN: maximum current consumption of the device (see Electrical Characteristics).
• I_VSLRUN: VS terminal run current (see Electrical Characteristics).

Current and Voltage Scaling Terms

• K_AM: maximum-to-minimum peak-primary current ratio (see Electrical Characteristics).

Transformer Terms

• L_P: transformer primary inductance.
• N_PA: transformer primary-to-auxiliary turns ratio.
• N_PS: transformer primary-to-secondary turns ratio.

Power Terms in Watts

• P_IN: converter maximum input power.
• P_INTRX: transformer maximum input power.
• P_OUT: full-load output power of the converter.
• P_SB: total stand-by input power.

Resistance Terms in Ω

• R_IPK: primary current programming resistance.
• R_ESR: total ESR of the output capacitors.
• R_PRL: preload resistance on the output of the converter.
• R_S1: high-side VS terminal resistance.
• R_S2: low-side VS terminal resistance.

Timing Terms in Seconds

• t_DMAG(min): minimum secondary rectifier conduction time.
• t_ON(min): minimum MOSFET on time.
• t_R: resonant frequency during the DCM (discontinuous conduction mode) time.

Voltage Terms in Volts

• V_BULK: highest bulk capacitor voltage for stand-by power measurement.
• V_BULK(min): minimum voltage on C_B1 and C_B2 at full power.
• V_CCR: constant-current regulating voltage (see Electrical Characteristics).
• V_OΔ: output voltage drop allowed during the load-step transient.
• V_DSPK: peak MOSFET drain-to-source voltage at high line.
• V_F: secondary rectifier, D_OUT, forward voltage drop at near-zero current.
• V_FA: auxiliary rectifier, D2, forward voltage drop.
• V_OCV: regulated output voltage of the converter, V_OUT in CV mode.
• V_VDD: voltage value on VDD terminal.
• V_OCC: target lowest converter output voltage in constant-current regulation.
• V_REV: peak reverse voltage on the secondary rectifier, D_OUT.
• V_RIPPLE: output peak-to-peak ripple voltage at full-load.
• V_VSR: CV regulating level at the VS input (see Electrical Characteristics).
• ΔV_UVLO: VDD_ON – VDD_OFF (see Electrical Characteristics).

AC Voltage Terms in V_RMS

• V_IN(max): maximum AC input voltage to the converter.
• V_IN(min): minimum AC input voltage to the converter.
• V_IN(run): converter input start-up (run) AC voltage.

Efficiency Terms

• η: converter overall efficiency.
• η_XFMR: transformer primary-to-secondary power transfer efficiency.

9.2.1.2.3 Maximum Target Switching Frequency

The maximum operative switching frequency of the converter should be selected with a trade-off between the efficiency requirement (generally decreasing the switching frequency improves efficiency because the switching losses are reduced) and transformer size (increasing the switching frequency results in decreased transformer size). Some limits to the maximum value of the switching frequency need to be taken into account.

The internal oscillator of the device cannot exceed 115 kHz (see f_SW(max) in the Electrical Characteristics) moreover the demagnetization time cannot be too short (t_DMAG(min) > 1 μs) in order to allow for the proper working of the discriminator (see Primary-Side Voltage Regulation) and the maximum operative switching frequency is linked to the demagnetization time from the equation below.

Equation 7.

So the target maximum operative switching frequency of the converter satisfies to the below condition:

Equation 8.

A good value for t_DMAG(min) is 1.2 μs with some margin respect the minimum allowed value.

9.2.1.2.4 Transformer Turns Ratio, Inductance, Primary-Peak Current

The maximum primary-to-secondary turns ratio can be determined by the target maximum switching frequency at full load, the minimum input capacitor bulk voltage, and the estimated DCM quasi-resonant time. Initially determine the maximum available total duty cycle of the on-time and secondary conduction time based on target switching frequency and DCM resonant time. For DCM resonant time, assume t_R = 1 / 500 kHz if you do not have an estimate from previous designs. For the transition mode operation limit, the period required from the end of secondary current conduction to the first valley of the V_DS voltage is half of the DCM resonant period, or 1 μs assuming 500-kHz resonant frequency. D_MAX can be determined using the equation below.

Equation 9.

Once D_MAX is known, the maximum turn ratio of the primary-to-secondary can be determined with the equation below.

Equation 10.

D_MAGCC is defined as the secondary diode conduction duty cycle during constant-current control mode operation. It is set internally by the UCC28910. This is the maximum allowable demagnetizing duty cycle and is equal to K_CC. The total voltage on the secondary winding needs to be determined; the sum of V_OCV and the secondary rectifier VF. The voltage V_BULK(min) is generally selected around 65% or 60%. V_BULK(min) is determined by the selection of the high-voltage input capacitors.

For the 5-V USB charger applications N_PS values from 13 to 17 are typically used.

9.2.1.2.5 Bulk Capacitance

The minimum input capacitance voltage, the input power of the converter based on target full-load efficiency, minimum input RMS voltage, and minimum AC input frequency are used to determine the input capacitance requirement.

Maximum input power is determined based on V_OCV, I_OCC, and the full-load efficiency target.

Equation 11.

The following equation provides an accurate solution for input capacitance based on a target minimum bulk capacitor voltage. To target a given input capacitance value, iterate the minimum capacitor voltage to achieve the target capacitance.

Equation 12.

In the case the input rectifier is a single diode (half-wave rectifier) and for bridge-input rectifier (full-wave rectifier), as in the schematic of Figure 26.

9.2.1.2.6 Output Capacitance

The output capacitance value is typically determined by the transient response requirement from no load. For example, in USB charger applications, it is often required to maintain a minimum output voltage of 4.1 V with a load-step transient from 0 mA to 500 mA (I_TRAN). The equation below assumes that the switching frequency can be at the UCC28910 minimum of f_SW(min).

Equation 13.

Another consideration on the output capacitor(s) is the ripple voltage requirement which is reviewed based on secondary-peak current and ESR. A margin of 20% is added to the capacitor ESR requirement in the equation below.

Equation 14.

9.2.1.2.7 VDD Capacitance, C_VDD

The capacitance on VDD needs to supply the device operating current until the output of the converter reaches the target minimum operating voltage in constant-current regulation. At this time the auxiliary winding can sustain the supply voltage to the UCC28910. The output current available to the load to charge the output capacitors is the constant-current regulation target. The equation below assumes the output current of the flyback is available to charge the output capacitance until the minimum output voltage is achieved.

Equation 15.

9.2.1.2.8 VS Resistor Divider

The VS divider resistors determine the output voltage regulation point of the flyback converter, also the high-side divider resistor (R_S1) determines the line voltage at which the controller enables continuous switching operation. R_S1 is initially determined based on transformer auxiliary to primary turn ratio and desired input voltage operating threshold.

Equation 16.

The low-side VS terminal resistor is selected based on desired output voltage regulation.

Equation 17.

9.2.1.2.9 R_VDD Resistor and Turn Ratio

The value of R_VDD and the auxiliary-to-secondary turns ratio should be selected with care in order to be sure that the VDD is always higher than the VDD_OFF (7 V maximum) threshold under all operating conditions. The R_VDD resistor also limits the current that can go into the VDD terminal preventing I_{VDDCLP_OC} clamp over-current protection from being erroneously activated.

9.2.1.2.10 Transformer Input Power

The power at the transformer input during full-load condition is given by the output power plus the power loss in the output diode plus the power consumption of the UCC28910 control logic (V_VDD × I_RUN) divided by the transformer efficiency that takes into account all the losses due to the transformer: copper losses, core losses, and energy loss in the leakage inductances.

Equation 18.

9.2.1.2.11 R_IPK Value

The R_IPK value sets the value of the DRAIN current peak that equals the transformer primary winding current peak value. This value also sets the value of the output current when working in CC mode according to the following formula:

Equation 19.

where

• D_MAGCC is the secondary diode conduction duty cycle
• N_PS is the primary-to-secondary transformer turns ratio
• V_CCR is the defined as V_CCR = V_CSTE(max) × K_CC and the value is specified in the Electrical Characteristics

The term takes into account that not all the energy stored in the transformer goes to the secondary side but some of this energy, through the auxiliary winding, is used to supply the device control logic. The transfer of energy always happens with unavoidable losses. These losses are accounted for through the transformer efficiency term (η_XFMR). Fixed the target value for I_OUT, the value of R_IPK can be calculated using the following formula:

Equation 20.

9.2.1.2.12 Primary Inductance Value

After you have fixed the maximum switching frequency and the maximum value of the primary current peak for your application, the primary inductance value can be fixed by the following equation:

Equation 21.

L_P_Tol is the tolerance on the primary inductance value of the transformer. Typical values of L_P_Tol are between ±10% and ±15%)

9.2.1.2.12.1 Secondary Diode Selection

The maximum reverse voltage that the secondary diode had to sustain can be calculated by the equation below where a margin of 30% is considered. Usually for this kind of application a Schottky diode is used to reduce the power losses due to the lower forward voltage drop. The maximum current rating of the diode is generally selected between two and five times the maximum output current (I_OCC).

Equation 22.

9.2.1.2.13 Pre-Load

When no load is applied on the converter output, the output voltage rises until the OVP (over voltage protection) of the device is tripped, because the device cannot operate at zero switching frequency. To avoid this, an R_PRL (pre-load resistance) is used. The value of this pre-load can be selected using the following equation:

Equation 23.

9.2.1.2.14 DRAIN Voltage Clamp Circuit

The main purpose of this circuit, as in most flyback converters, is to prevent the DRAIN voltage from rising up to the FET break-down voltage, at the FET turn-off, and destroying the FET itself. An additional task, required by the primary-side regulation mechanism, is to provide a clean input to UCC28910 VS terminal by damping the oscillation that is typically present on the DRAIN voltage due to the transformer primary leakage inductance.

To perform damping, the D1 diode selected is not a fast recovery diode (0.3 µs < t_RR < 1 μs) so the reverse current can flow in the RLC over damped circuit. This RLC circuit is formed by the transformer primary leakage inductance (L_LKP), the resistance R_CLP, and the capacitance C_CLP. To ensure proper damping the resistance R_CLP has to satisfy the following condition:

Equation 24.

The capacitance C_CLP should not be too high so it does not require too much energy to be charged. Typical values for C_CLP are between 100 pF and 1 nF.

If the R_CLP is too high, the additional drop on this resistance can cause excessively high DRAIN voltage. The DRAIN clamp circuit of Figure 27 can be modified as shown in Figure 32 where R_CLP was divided into resistance (R_CLP1 and R_CLP2). Resistance R_DCH can be added to discharge the C_CLP capacitance before the next switching cycles. This can help in dumping oscillations caused by leakage inductance.

Figure 32. DRAIN Clamp Circuit Options

Table 2. Average Efficiency Performance of the UCC28910FBEVM-526

Table 3. Standby Power, No-Load Power Consumption of the Converter