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ZHCSCD4B July 2013 – August 2014 UCC28910

PRODUCTION DATA.

封裝選項

機械數(shù)據(jù) (封裝 | 引腳)

D|7
- MPDS347D

散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)

訂購信息

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range, T_A = 25°C (unless otherwise noted) ⁽¹⁾⁽²⁾

		MIN	MAX	UNIT
V_DRAIN	DRAIN voltage	Internally limited⁽³⁾	700	V
I_DRAIN	Negative drain current	–100		mA
V_DD	Supply voltage		Internally limited⁽³⁾	V
I_VDD(clp)	Maximum VDD clamp current		10	mA
V_VS	Voltage range	Internally limited⁽³⁾	7	V
V_IPK	Voltage range	−0.5	5.0	V
I_VS	Peak vs terminal current (current out of the terminal)	1.2		mA
I_DRAIN	Drained pulsed drain current⁽⁴⁾		950	mA
T_J	Operating junction temperature range	−55	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltages are with respect to GND. Currents are positive into, negative out of the specified terminal. These ratings apply over the operating ambient temperature ranges unless otherwise noted.

(3) Do not drive with low impedance voltage source.

(4) Maximum pulse length = 100 μs.

7.2 Handling Ratings

		MIN	MAX	UNIT
T_STG	Storage temperature range	−65	150	°C
	Lead temperature 1.6 mm (1/16 inch) from case for 10 seconds		260	°C
V_ESD⁽¹⁾	Human Body Model (HBM)⁽²⁾	−2000	2000	V
V_ESD⁽¹⁾	Charged Device Model (CDM)⁽²⁾	−500	500	V

(1) Electrostatic discharge (ESD) to measure device sensitivity and immunity to damage caused by assembly line electrostatic discharges into the device.

(2) Level listed above is the passing level per ANSI, ESDA, and JEDEC JS-001. JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions⁽¹⁾⁽²⁾

over operating free-air temperature range (unless otherwise noted) V_VDD = 15 V, T_A = -40°C to 125°C, T_A = T_J

		MIN	NOM	MAX	UNIT
V_VDD		6		V_VDD(clp)	V
I_VS				1	mA
I_{D(peak_max)}			600		mA
T_J	Operating junction temperature	-40		125	°C

(1) Unless otherwise noted, all voltages are with respect to GND.

(2) In case of thermal shut down, if T_A > 100°C, the device does not restart because of the T_J(hys)Electrical Characteristics.

7.4 Thermal Information

THERMAL METRIC⁽¹⁾		UCC28910	UNITS
		D
		7 TERMINAL
θ_JA	Junction-to-ambient thermal resistance	102.2	°C/W
θ_JCtop	Junction-to-case (top) thermal resistance	39.1
θ_JB	Junction-to-board thermal resistance	54.7
ψ_JT	Junction-to-top characterization parameter	5.4
ψ_JB	Junction-to-board characterization parameter	54.7

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

7.5 Output Power

PART NUMBER	175 V_AC TO 265 V_AC		90 V_AC TO 265 V_AC		UNIT
PART NUMBER	ADAPTER ⁽¹⁾	OPEN FRAME ⁽²⁾	ADAPTER ⁽¹⁾	OPEN FRAME ⁽²⁾	UNIT
UCC28910	10	12	6	7.5	W

(1) Typical continuous power in enclosed adapter at 50°C ambient, with adequate (560 mm², 2 oz.) copper area connected on GND pins.

(2) Maximum continuous power with open frame design at 50°C ambient, with adequate copper area connected on GND pins and/or adequate air flow to have 50°C/W as R_THJA.

7.6 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted), V_VDD = 15 V, T_A = -40°C to 125°C, T_A = T_J

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
SUPPLY INPUT
I_RUN	Supply current, run	V_VDD = 15 V, V_VS = 3.9 V, f_SW = f_SW(max)	2.3	2.9	3.4	mA
I_RUNQ	Quiescent supply current	V_VDD = 15 V, V_VS = 3.9 V, f_SW = 0 Hz	1.90	2.35	2.80	mA
I_WAIT	Wait supply current	V_VDD= 15 V, V_VS = 4.1 V, f_SW = f_SW(min)	150	270	370	µA
I_WAITQ	Quiescent wait supply current	V_VDD = 15 V, V_VS = 4.1 V, f_SW = 0 Hz	150	200	280	µA
I_START	Supply current before start	V_VDD from 0 V to 5.6 V, V_DRAIN = 0 V		65	90	µA
I_FAULT	Supply current after fault	V_VDD = 15 V, f_SW = 0 Hz		190	260	µA
UNDER-VOLTAGE LOCKOUT
VDD_ON	VDD turn-on threshold	V_VDD low to high	9.0	9.5	10.0	V
VDD_OFF	VDD turn-off threshold	V_VDD high to low	6.0	6.5	7.0	V
VDD_HV(on)	HV current source start	V_VDD high to low	4.8	5.2	5.6	V
ΔV_UVLO	UVLO hysteresis	VDD_ON – VDD_OFF	2.8	3.0	3.2	V
STARTUP CURRENT SOURCE
I_CH1	Startup current with VDD shorted to GND	V_VDD < 250 mV, V_DRAIN = 100 V	–300		–100	µA
I_CH2	Sourced current for startup at high VDD	V_VDD = 8 V, V_DRAIN = 100 V	–9.75		–0.40	mA
I_CH3	Sourced current for startup at low VDD	V_VDD = 2 V, V_DRAIN = 100 V	–13.75		–1.30	mA
VS INPUT
V_VSR	Regulating level	Measured in no load condition, T_J = 25°C	4.01	4.05	4.09	V
V_VSNC	Negative clamp level	I_VS = –300 μA,	–190	–250	–325	mV
I_VS	Input bias current	V_VS = 4 V	–0.25	0.00	0.25	µA
PROTECTION
I_DOCP	DRAIN over current	I_PK terminal shorted to GND	0.725	0.850	0.925	A
V_{CSTE_OCP}	Equivalent V_CST(OCP)	V_VS = 3.9 V, I_D(ocp) x R_IPK	670	770	830	V
V_{CSTE_OCP2}	Equivalent V_CST(OCP2)	V_VS = 3.9 V, I_D(ocp2) x R_IPK		1200		V
t_ONMAX(max)	Maximum FET on time at high load	V_VS < 3.9 V, I_PK shorted to GND	13	18	24	µs
t_ONMAX(min)	Maximum FET on time at low load	V_VS > 4.1 V, I_PK shorted to GND	4.3	6	10	µs
V_OVP	Over-voltage threshold	At VS input, T_J = 25°C	4.45	4.60	4.75	V
I_VSLRUN	VS line sense run current	Current out of VS terminal – increasing	175	215	260	µA
I_VSLSTOP	VS line sense stop current	Current out of VS terminal – decreasing	60	75	100	µA
K_VSL	Line sense I_VS ratio	I_VSL(run) / I_VSL(stop)	2.55	2.70	2.90	A/A
VDD_CLP	VDD voltage clamp	I_VDDCLP forced = 2 mA	26	28	30	V
I_{VDDCLP_OC}	VDD clamp over current	V_VDD > 25 V	4.65	6.00	7.65	mA
T_J(stop)	Thermal shutdown temperature	Internal junction temperature		150		°C
T_J(hys)	Thermal shutdown hysteresis	Internal junction temperature		50		°C
POWER FET
BV_DSS	Break-down voltage	T_J = 25°C	700			V
R_DS(on)	Power FET on resistance	I_D = 150 mA, T_J = 25°C		10.5	12.0	Ω
R_DS(on)	Power FET on resistance	I_D = 150 mA, T_J = 125°C		18.4	21.5	Ω
I_LEAKAGE	DRAIN terminal leakage current	V_DS = 400 V HV, VS = 4.2 V DC T_J = 25°C			10	µA
		V_DS = 400 V HV, VS = 4.2 V DC T_J = 125°C			20	µA
		V_DS = 700 V HV, VS = 4.2 V DC T_J = 25°C			10	µA
CURRENTS
I_{D_PEAK(max)}	Maximum DRAIN peak current	V_VDD = 15 V, IPK terminal shorted to GND, T_J = 25°C	582	600	618	mA
R_{IPK_SHORT}	IPK to GND resistance Max to assume IPK shorted to GND	V_VDD = 15 V			200	Ω
R_IPK(min)	IPK to GND minimum resistance	V_VDD = 15 V	900			Ω
V_CSTE(max)	Equivalent current sense threshold	V_VDD = 15 V, V_VS = 3.9 V, I_{D_PK(max)} × R_IPK , T_J = 25°C	532	540	548	V
V_CSTE(min)	Equivalent current sense threshold	V_VDD = 15 V, V_VS = 4.1 V, I_{D_PK(min)} × R_IPK	160	180	200	V
K_AM	AM control ratio	V_CSE(max) / V_CSE(min)	2.30	3.00	3.50	V/V
K_CC	CC regulation gain	V_VDD = 15 V, V_VS > 3.9 V; t_DEMAG × f_SW		0.413
V_CCR	CC regulation constant	V_VDD = 15 V, V_VS < 3.9 V, V_CSET(max) × K_CC, T_J = 25°C	216	223	230	V

7.7 Switching Characteristics

over operating free-air temperature range (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
TIMING
f_SW(max)	Maximum switching frequency	V_VS< 3.9 V	105	115	125	kHz
f_SW(min)	Minimum switching frequency	V_VS > 4.1 V	360	420	490	Hz
t_ZTO	Zero crossing timeout delay	V_VS < 3.9 V	1.80	2.10	2.65	µs
t_ON(min)	Minimum on time	I_PK = 0.85 V		390		ns