ZHCSIB2B December 2017 – October 2019 UCC28064A
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 修訂歷史記錄
- 5 說明 （續）
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 Principles of Operation
- 8.3.2 Natural Interleaving
- 8.3.3 On-Time Control, Maximum Frequency Limiting, Restart Timer and Input Voltage Feed-Forward compensation
- 8.3.4 Distortion Reduction
- 8.3.5 Zero-Current Detection and Valley Switching
- 8.3.6 Phase Management and Light-Load Operation
- 8.3.7 Burst Mode Operation
- 8.3.8 External Disable
- 8.3.9 Improved Error Amplifier
- 8.3.10 Soft Start
- 8.3.11 Brownout Protection
- 8.3.12 Line Dropout Detection
- 8.3.13 VREF
- 8.3.14 VCC
- 8.3.15
System Level Protections
- 8.3.15.1 Failsafe OVP - Output Over-voltage Protection
- 8.3.15.2 Overcurrent Protection
- 8.3.15.3 Open-Loop Protection
- 8.3.15.4 VCC Undervoltage Lock-Out (UVLO) Protection
- 8.3.15.5 Phase-Fail Protection
- 8.3.15.6 CS - Open, TSET - Open and Short Protection
- 8.3.15.7 Thermal Shutdown Protection
- 8.3.15.8 Fault Logic Diagram
- 8.4 Device Functional Modes
-
9 Application and Implementation
- 9.1 Application Information
- 9.2
Typical Application
- 9.2.1 Design Requirements
- 9.2.2
Detailed Design Procedure
- 9.2.2.1 Custom Design With WEBENCH® Tools
- 9.2.2.2 Inductor Selection
- 9.2.2.3 ZCD Resistor Selection RZA, RZB
- 9.2.2.4 HVSEN
- 9.2.2.5 Output Capacitor Selection
- 9.2.2.6 Selecting RS For Peak Current Limiting
- 9.2.2.7 Power Semiconductor Selection (Q1, Q2, D1, D2)
- 9.2.2.8 Brownout Protection
- 9.2.2.9 Converter Timing
- 9.2.2.10 Programming VOUT
- 9.2.2.11 Voltage Loop Compensation
- 9.2.3 Application Curves
- 10Power Supply Recommendations
- 11Layout
- 12Package Option Addendum
- 13器件和文檔支持
- 14機械、封裝和可訂購信息
8.3.7 Burst Mode Operation
To further improve light load efficiency burst mode operation can be used. In this case the burst mode threshold is fed to BRST pin by an external source that could be a simple resistor divider connected to the VREF pin. If COMP pin voltage goes below the BRST pin voltage the converter stops switching. When the COMP voltage exceeds BRST pin voltage plus hysteresis, the converter restarts switching.
In order to have a smooth transition between switching and not switching and vice-versa burst soft-on and burst soft-off features are added. So when the COMP voltage goes below BRST voltage switching is not stopped immediately, but there will be eight additional switching cycles where FET on time is decreased gradually. In similar way when COMP voltage exceeds BRST voltage plus hysteresis a soft-on period occurs where the on time is increased gradually to a value that corresponds to the present COMP voltage in eight switching cycles.
When the load decreases the device is intended to operate in single phase mode starting from 35% to 15% of rated load and goes to burst mode at lower load values when single phase operation is activated. If the PHB threshold is lower than the Burst mode threshold, single phase operation is forced during soft-on and soft-off periods of burst mode.
Similar to the PHB feature the burst mode threshold has two different levels depending if the PFC input voltage is in the range of 90 to 132 VRMS (US main) or in the range of 180 to 265 VRMS (European main). If the peak voltage on VINAC pin peak voltage exceeds 3.5 V (typ.) a small current (3 µA typically) is provided from BRST pin. If a resistor divider is used to set the BRST pin voltage this current will raise the voltage.
Use Equation 11 and Equation 12 to calculate the resistor divider that sets the Burst Mode thresholds. These equations are identical to the equations used to calculate the PHB resistor divider.
RU and RD are the upper and the lower resistence of the resistor divider connected to VREF pin.
