Proper PCB layout is extremely important in a
high-current fast-switching circuit to provide appropriate device operation and
design robustness. The UCC27624V gate driver
incorporates small propagation delays and powerful output stages capable of
delivering large current peaks with very fast rise and fall times at the gate of
power MOSFET to facilitate very quick voltage transitions. Very high di/dt causes
unacceptable ringing if the trace lengths and impedances are not well controlled.
The following circuit layout guidelines are recommended when designing with these
high-speed drivers.
- Place the driver IC as close as
possible to the power device in order to minimize the length of high-current
traces between the driver IC output pins and the gate of the switching power
device.
- Place the VDD bypass capacitors
between VDD and GND as close as possible to the driver IC with minimal trace
length to improve the noise filtering. These capacitors support high peak
current being drawn from VDD pin, during turn-on of power MOSFET. The use of low
inductance surface-mounted-device (SMD) components such as 50V rated X7R chip
capacitors are highly recommended.
- The turn-on and turn-off current
loop paths (driver device, power MOSFET and VDD bypass capacitor) must be
minimized as much as possible in order to keep the stray inductance to a
minimum. High dI/dt is established in these loops at two instances, namely
during turn-on and turn-off transients, which induces significant voltage
transients on the output pin of the driver device and Gate of the power
MOSFET.
- Wherever possible, parallel the
source and return traces to take advantage of flux cancellation.
- Separate power traces and signal
traces, such as output and input signals.
- To minimize switch node
transients and ringing, adding some gate resistance and/or snubbers on the power
devices may be necessary. These measures may also reduce
EMI.
- Star-point grounding is a good
way to minimize noise coupling from one current loop to another. The GND of the
driver is connected to the other circuit nodes such as source of power MOSFET
and ground of PWM controller at one, single point. The connected paths must be
as short as possible to reduce inductance and be as wide as possible to reduce
resistance.
- Use a ground plane to provide
noise shielding. Fast rise and fall times at OUT pin of the driver IC may
corrupt the input signals of the driver IC. The ground plane must not be a
conduction path for any high current (power stage) loop. Instead the ground
plane must be connected to the star-point with one single trace to establish the
ground potential. In addition to noise shielding, the ground plane can help in
power dissipation as well
- External gate resistor and
parallel diode-resistor combination may come in handy when replacing any gate
driver IC with UCC27624V device in existing or
new designs, specifically if they do not have the same drive strength.