ZHCSPL5C March 2022 – May 2024 UCC27624-Q1
PRODUCTION DATA
| 參數(shù) | 測試條件 | 最小值 | 典型值 | 最大值 | 單位 | |
|---|---|---|---|---|---|---|
| 偏置電流 | ||||||
| IVDDq | VDD 靜態(tài)電源電流 | VINx = 3.3V，VDD = 3.4V，ENx = VDD | 300 | 450 | μA | |
| IVDD | VDD 靜態(tài)電源電流 | VINx = 3.3V，ENx = VDD | 0.6 | 1.0 | mA | |
| IVDD | VDD 靜態(tài)電源電流 | VINx = 0V，ENx = VDD | 0.7 | 1.0 | mA | |
| IVDDO | VDD 工作電流 | fSW = 1000kHz，ENx = VDD，VINx = 0V 至 3.3V PWM | 3.2 | 3.8 | mA | |
| IDIS | VDD 禁用電流 | VINx = 3.3V，ENx = 0V | 0.8 | 1.1 | mA | |
| 欠壓鎖定 (UVLO) | ||||||
| VVDD_ON | VDD UVLO 上升閾值 | 3.8 | 4.1 | 4.4 | V | |
| VVDD_OFF | VDD UVLO 下降閾值 | 3.5 | 3.8 | 4.1 | V | |
| VVDD_HYS | VDD UVLO 遲滯 | 0.3 | V | |||
| 輸入（INA、INB） | ||||||
| VINx_H | 輸入信號高閾值 | 輸出高電平，ENx = HIGH | 1.8 | 2 | 2.3 | V |
| VINx_L | 輸入信號低閾值 | 輸出低電平，ENx = HIGH | 0.8 | 1 | 1.2 | V |
| VINx_HYS | 輸入信號遲滯 | 1 | V | |||
| RINx | INx 引腳下拉電阻 | INx = 3.3V | 120 | kΩ | ||
| 使能（ENA、ENB） | ||||||
| VENx_H | 使能信號高電平閾值 | 輸出高電平，INx = HIGH | 1.8 | 2 | 2.3 | V |
| VENx_L | 使能信號低電平閾值 | 輸出低電平，INx = HIGH | 0.8 | 1 | 1.2 | V |
| VENx_HYS | 使能信號遲滯 | 1 | V | |||
| RENx | EN 引腳上拉電阻 | ENx = 0V | 200 | kΩ | ||
| 輸出（OUTA、OUTB） | ||||||
| ISRC(1) | 峰值輸出拉電流 | VDD = 12V，CVDD = 10μF，CL = 0.1μF，f = 1kHz | 5 | A | ||
| ISNK(1) | 峰值輸出灌電流 | VDD = 12V，CVDD = 10μF，CL = 0.1μF，f = 1kHz | -5 | A | ||
| ROH(2) | 上拉電阻 | IOUT = –50mA，請參閱節(jié) 6.3.4。 | 5 | 8.5 | ? | |
| ROL | 下拉電阻 | IOUT = 50mA | 0.6 | 1.1 | ? | |