ZHCSGZ9G October 2017 – November 2022 TUSB564
PRODUCTION DATA
The TUSB564 has (I2C_EN, EQ[1:0], DPEQ[1:0], and SSEQ[1:0]) 4-level inputs pins that are used to control the equalization gain and place TUSB564 into different modes of operation. These 4-level inputs utilize a resistor divider to help set the 4 valid levels and provide a wider range of control settings. There is an internal 35 k? pull-up and a 95 k? pull-down. These resistors, together with the external resistor connection combine to achieve the desired voltage level.
| LEVEL | SETTINGS |
|---|---|
| 0 | Option 1: Tie 1 K? 5% to GND. Option 2: Tie directly to GND. |
| R | Tie 20 K? 5% to GND. |
| F | Float (leave pin open) |
| 1 | Option 1: Tie 1 K? 5%to VCC. Option 2: Tie directly to VCC. |
All four-level inputs are latched on rising edge of internal reset. After tcfg_hd, the internal pull-up and pull-down resistors will be isolated in order to save power.