ZHCSDU0F May 2015 – March 2022 TUSB320
PRODUCTION DATA
The TUSB320 device can be configured for I2C communication or GPIO outputs using the ADDR pin. The ADDR pin is a tri-level control pin. When the ADDR pin is left floating (NC), the TUSB320 device is in GPIO output mode. When the ADDR pin is pulled high or pulled low, the TUSB320 device is in I2C mode.
All outputs for the TUSB320 device are open drain configuration.
The OUT1 and OUT2 pins are used to output the Type-C current mode when in GPIO mode. Additionally, the OUT3 pin is used to communicate the audio accessory mode in GPIO mode. Table 7-3 lists the output pin settings. See the Pin Functions table for more information.
| OUT1 | OUT2 | ADVERTISEMENT |
|---|---|---|
| H | H | Default Current in Unattached State |
| H | L | Default Current in Attached State |
| L | H | Medium Current (1.5 A) in Attached State |
| L | L | High Current (3.0 A) in Attached State |
When operating in I2C mode, the TUSB320 device uses the SCL and SDA lines for clock and data and the INT_N pin to communicate a change in I2C registers, or an interrupt, to the system. The INT_N pin is pulled low when the TUSB320 device updates the registers with new information. The INT_N pin is open drain. The INTERRUPT_STATUS register should be set when the INT_N pin is pulled low. To clear the INTERRUPT_STATUS register, the end user writes to I2C.
When operating in GPIO mode, the OUT3 pin is used in place of the INT_N pin to determine if an audio accessory is detected and attached. The OUT3 pin is pulled low when an audio accessory is detected.
When using the 3.3 V supply for I2C, the end user must ensure that the VDD is 3 V and above. Otherwise the I2C may back power the device.