ZHCSNL3A December 2021 – November 2023 TPSM8D6C24
PRODUCTION DATA
| CMD Address | 7Eh |
| Write Transaction: | Write Byte |
| Read Transaction: | Read Byte |
| Format: | Unsigned Binary (1 byte) |
| Phased: | Yes |
| NVM Backup: | No |
| Updates: | On-the-fly |
The STATUS_CML command returns one data byte with contents relating to communications, logic, and memory as follows. All supported bits can be cleared either by CLEAR_FAULTS, or individually by writing 1b to the (7Eh) STATUS_CML register in their position, per the PMBus 1.3.1 Part II specification section 10.2.4.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RW | RW | RW | RW | RW | R | RW | R |
| IVC | IVD | PEC | MEM | PROC_FLT | 0 | COMM | 0 |
| LEGEND: R/W = Read/Write; R = Read only |
| Bit | Field | Access | Reset | Description |
|---|---|---|---|---|
| 7 | IVC | RW | 0b | 0b: Latched flag indicating invalid or unsupported command was
not received. 1b: Latched flag indicating an invalid or unsupported command was received. |
| 6 | IVD | RW | 0b | 0b: Latched flag indicating invalid or unsupported data was
not received. 1b: Latched flag indicating an invalid or unsupported data was received. |
| 5 | PEC | RW | 0b | 0b: Latched flag indicating no packet error check has
failed. 1b: Latched flag indicating a packet error check has failed. |
| 4 | MEM | RW | 0b | 0b: Latched flag indicating no memory error was
detected. 1b: Latched flag indicating a memory error was detected. |
| 3 | PROC_FLT | RW | 0b | 0b: Latched flag indicating no logic core error was
detected. 1b: Latched flag indicating a logic core error was detected. |
| 2 | Not supported | R | 0b | Not supported and always set to 0b. |
| 1 | COMM | RW | 0b | 0b: Latched flag indicating no communication error
detected. 1b: Latched flag indicating communication error detected. |
| 0 | Not supported | R | 0b | Not supported and always set to 0b. |
All bits that can trigger SMBALERT have a corresponding bit in SMBALERT_MASK.
Loop followers report a back-channel communications issue as a CML fault on their phase.
The corresponding bit STATUS_BYTE is an OR’ing of the supported bits in this command. When a fault condition in this command occurs, the corresponding bit in STATUS_BYTE is updated. Likewise, if this byte is individually cleared (for example, by a write of 1 to a latched condition), it clears the corresponding bit in STATUS_BYTE.