ZHCSG68F MARCH 2017 – JANUARY 2019 TPSM846C23
PRODUCTION DATA.
The pol bit controls the polarity of the CNTL pin. For a change to become effective, the contents of the ON_OFF_CONFIG register must be stored to nonvolatile memory using the STORE_DEFAULT_ALL command and the device power cycled. Simply writing a new value to this bit does not change the polarity of the CNTL pin.
| BIT VALUE | ACTION |
|---|---|
| 0 | CNTL pin is active low. |
| 1 | CNTL pin is active high. |