ZHCSG68F MARCH 2017 – JANUARY 2019 TPSM846C23
PRODUCTION DATA.
The PMBus specification requires that each device connected to the PMBus have a unique address on the bus. The TPSM846C23 device has 64 possible addresses (0 through 63 in decimal) that can be assigned by connecting resistors from the ADDR0 and ADDR1 pins to AGND. The address is set in the form of two octal digits (0 to 7), one digit for each pin. ADDR1 is the high order digit, and ADDR0 is the low-order digit. These address selection resistors must be 1% tolerance or better. Using resistors other than the recommended values can result in devices responding to adjacent addresses. The PMBus address, in decimal, is given by the following expression:
PMBus Address = 8 × ADDR1(level) + ADDR0(level)
The E96 series resistors with no worse than 1% tolerance suggested for each digit value are shown in Table 1.
| LEVEL | RESISTOR VALUE (kΩ) |
|---|---|
| 0 | 7.15 |
| 1 | 14 |
| 2 | 22.6 |
| 3 | 34.8 |
| 4 | 51.1 |
| 5 | 78.7 |
| 6 | 121 |
| 7 | 187 |
The TPSM846C23 device also detects values that are out of range on the ADDR0 and ADDR1 pins. If the device detects that either pin has an out-of-range resistance connected to it, the device continues to respond to PMBus interface commands, but does so at address 127 decimal, which is outside of the possible programmed addresses. It is possible, but not recommended, to use the device in this condition, especially if other devices are present on the bus or if another device could possibly occupy the 127 decimal address.
Certain addresses in the I2C address space are reserved for special functions, and it is possible to set the address of the devices to respond to these addresses. The user is responsible for knowing which of these reserved addresses are in use in a system and for setting the address of the devices accordingly so as not to interfere with other system operations. The devices can be set to respond to the global call address or 0. TI recommends not setting the devices to this address unless the user is certain that no other devices respond to this address and that the overall bus is not affected by having such an address present.