ZHCSG68F MARCH 2017 – JANUARY 2019 TPSM846C23
PRODUCTION DATA.
These bits are overtemperature fault retry time delay retting. The default for this bit is 111b.
| BIT VALUE | ACTION |
|---|---|
| 000 | A zero value for the retry time delay setting means that the unit does not attempt to delay a restart. This is only supported when restart is disabled by RS[2:0] = 000. The output remains disabled until the fault is cleared (Refer to section 10.7 of the PMBus specification) |
| 111 | A one value for the retry time delay setting means that the unit waits 7 TON_RISE times before it goes through a normal startup (soft start). This is only supported when restart is enabled by RS[2:0] = 111. |
These bits are direct reflections of the RS[2] (bit 5) value in this register.