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ZHCSKH0C November 2019 – September 2021 TPSM53604

PRODUCTION DATA

封裝選項

機械數據 (封裝 | 引腳)

RDA|15
- MPQF514B

散熱焊盤機械數據 (封裝 | 引腳)

訂購信息

6.5 Electrical Characteristics

Limits apply over T_A = –40°C to +105°C, V_IN = 12 V, V_OUT = 3.3 V, I_OUT = I_OUT maximum, (unless otherwise noted); C_IN1 = 2x10 μF, 50-V, 1206 ceramic; C_IN2 = 100 nF, 50-V, 0603 ceramic; C_OUT = 3x22 μF, 25-V, 1210 ceramic. Minimum and maximum limits are specified through production test or by design. Typical values represent the most likely parametric norm and are provided for reference only.

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
INPUT VOLTAGE (V_IN)
V_IN	Input voltage range	Over I_OUT range	3.8 ⁽¹⁾		36	V
	V_IN turn on	V_IN increasing, I_OUT = 0.2 A		3.55		V
	V_IN turn off	V_IN decreasing, I_OUT = 0.2 A		3.05		V
I_Q	Quiescient current	Non-switching, V_FB = 1.2 V		24		μA
I_SHDN	Shutdown supply current	V_EN = 0 V, I_OUT = 0 A		5	10	μA
INTERNAL LDO (V5V)
V5V	Internal LDO output voltage appearing at the V5V pin	6 V ≤ V_IN ≤ 36 V	4.75	5	5.25	V
FEEDBACK
V_FB	Feedback voltage⁽²⁾	–40°C ≤ T_J ≤ +125°C, I_OUT = 0.75 A	0.985	1	1.015	V
	Load regulation	T_A = +25°C, 0.8 A ≤ I_OUT ≤ 4 A		0.06		%
	Line regulation	T_A = +25°C, I_OUT = 0.75 A, Over V_IN range		0.15		%
I_FB	Current into FB pin	FB = 1 V		0.2	50	nA
CURRENT
I_OUT	Output current	T_A = 25°C	0		4	A
I_OUT	Over-current threshold			5.5		A
V_HC	FB pin voltage required to trip short-circuit hiccup mode			0.4		V
t_HC	Time between current-limit hiccup burst			94		ms
ENABLE (EN PIN)
V_EN-LDO-H	EN input level required to turn on internal LDO	Rising threshold			1	V
V_EN-LDO-L	EN input level required to turn off internal LDO	Falling threshold	0.3			V
V_EN-H	EN input level required to start switching	Rising threshold	1.2	1.23	1.26	V
V_EN-HYS	Hysteresis below V_EN-H	Falling		100		mV
I_LKG-EN	Enable input leakage current	V_EN = 3.3 V		0.2		nA
POWER GOOD (PGOOD PIN)
V_PG-HIGH-UP	V_OUT rising (fault)	% of FB voltage		107		%
V_PG-HIGH-DN	V_OUT falling (good)	% of FB voltage		105		%
V_PG-LOW-UP	V_OUT rising (good)	% of FB voltage		94		%
V_PG-LOW-DN	V_OUT falling (fault)	% of FB voltage		92		%
R_PG	Power-good flag R_DSON	V_EN = 0 V		35		?
V_IN-PG	Minimum input voltage for proper PGOOD function	50-μA, EN = 0 V			2	V
V_PG	PGOOD logic low output	50-μA, EN = 0 V, V_IN = 2 V			0.2	V
PERFORMANCE
η	Efficiency	I_OUT = 2 A, T_A = 25°C		91		%
SOFT START
t_SS	Internal soft-start time			4		ms
SWITCHING FREQUENCY
?_SW	Switching frequency	I_OUT = 2 A, T_A = 25°C		1.4⁽³⁾		MHz

(1) The recommended minimum V_IN is 3.8 V or (VOUT + 1 V), whichever is greater. See the Section 7.3.9 section for more information.

(2) The overall output voltage tolerance will be affected by the tolerance of the external R_FBT and R_FBB resistors.

(3) The typical switching frequency of this device will change based on operating conditions. See the Section 7.4.2 section for more information.