ZHCSK64B October 2019 – December 2020 TPSM265R1
PRODUCTION DATA
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
Refer to Section 8.2 for circuit designs. TA = 25°C unless otherwise noted.
Figure 6-21 Efficiency

| Applies to a device soldered to a 50-mm × 75-mm, 4-layer PCB |
Figure 6-22 Efficiency Log Scale
| COUT = 47 μF, 16-V, ceramic |