ZHCSK64B October 2019 – December 2020 TPSM265R1
PRODUCTION DATA
Refer to the Section 8.2 for circuit designs. TA = 25°C unless otherwise noted.
Figure 6-11 Efficiency

| Applies to a device soldered to a 50 mm × 75 mm, 4-layer PCB |
Figure 6-12 Efficiency Log Scale
| COUT = 47 μF, 16-V, ceramic |