SLVSHL7 September 2025 TPSI2240-Q1
ADVANCE INFORMATION
請參考 PDF 數據表獲取器件具體的封裝圖。
When the voltage between the S1 and S2 pins exceeds ±1200V the secondary side MOSFETs could enter an avalanche mode of operation. The MOSFETs and the 11 DWQ package have been designed and qualified to be robust in this mode of operation to support Dielectric Withstand Testing (HiPot). To help ensure the thermal performance of the the system in this mode of operation, refer to the PCB Layout Guidelines.