ZHCSLG9A October 2020 – August 2024 TPS99000S-Q1
PRODUCTION DATA
- 1
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 Pin Configuration and Functions
-
5 Specifications
- 5.1 Absolute Maximum Ratings
- 5.2 ESD Ratings
- 5.3 Recommended Operating Conditions
- 5.4 Thermal Information
- 5.5 Electrical Characteristics—Transimpedance Amplifier Parameters
- 5.6 Electrical Characteristics—Digital to Analog Converters
- 5.7 Electrical Characteristics—Analog to Digital Converter
- 5.8 Electrical Characteristics—FET Gate Drivers
- 5.9 Electrical Characteristics—Photo Comparator
- 5.10 Electrical Characteristics—Voltage Regulators
- 5.11 Electrical Characteristics—Temperature and Voltage Monitors
- 5.12 Electrical Characteristics—Current Consumption
- 5.13 Power-Up Timing Requirements
- 5.14 Power-Down Timing Requirements
- 5.15 Timing Requirements—Sequencer Clock
- 5.16 Timing Requirements—Host and Diagnostic Port SPI Interface
- 5.17 Timing Requirements—ADC Interface
- 5.18 Switching Characteristics
-
6 Detailed Description
- 6.1 Overview
- 6.2 Functional Block Diagram
- 6.3
Feature Description
- 6.3.1
Illumination Control
- 6.3.1.1 Illumination System High Dynamic Range Dimming Overview
- 6.3.1.2 Illumination Control Loop
- 6.3.1.3 Continuous Mode Operation
- 6.3.1.4
Discontinuous Mode Operation
- 6.3.1.4.1 Discontinuous Mode Pulse Width Limit
- 6.3.1.4.2 COMPOUT_LOW Timer in Discontinuous Operation
- 6.3.1.4.3 Dimming Within Discontinuous Operation Range
- 6.3.1.4.4 Multiple Pulse Heights to Increase Bit Depth
- 6.3.1.4.5 TIA Gain Adjustment
- 6.3.1.4.6 Current Limit in Discontinuous Mode
- 6.3.1.4.7 CMODE Big Cap Mode in Discontinuous Operation
- 6.3.2 Over-Brightness Detection
- 6.3.3 Analog to Digital Converter
- 6.3.4 Power Sequencing and Monitoring
- 6.3.5 DMD Mirror Voltage Regulator
- 6.3.6 Low Dropout Regulators
- 6.3.7 System Monitoring Features
- 6.3.8 Communication Ports
- 6.3.1
Illumination Control
- 6.4 Device Functional Modes
- 6.5 Register Maps
- 7 Application and Implementation
- 8 Power Supply Recommendations
- 9 Layout
- 10Device and Documentation Support
- 11Revision History
- 12Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- PZP|100
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
- PZP|100
訂購信息
6.3.1.3 Continuous Mode Operation
When operating in continuous mode (continuous light output mode) a hysteretic control scheme is utilized. Real-time analog light amplitude measurements are used in the photo feedback loop to maintain a target light level. Figure 6-3 highlights the photo feedback control loop path in the driver for continuous mode.
Figure 6-3 Continuous Mode Photo Feedback PathThe on-chip analog comparator of the TPS99000S-Q1 is used to compare the desired target LED light amplitude to the actual LED light output voltage from the photodiode TIA circuit. When the light output is below the threshold (set by the 12-bit photo feedback DAC output), the comparator will output a high level, causing DRV_EN to go high, which creates a connection from the power rail to the LED drive inductor to be made through the LED drive PFET. This connection will cause current flow to increase through the inductor. This current flows through an LED when its FET is enabled. When the light value goes above the threshold, DRV_EN goes low and the PFET is turned off, breaking the connection to the power rail with very little delay. Once the light level drops back below the threshold, DRV_EN goes high again and the PFET is turned back on, delivering more power to the LED. This process repeats as long as the LED circuit is enabled.
Hysteretic control results in a ripple in the LED current. The amplitude and frequency of this ripple is a function of inductor inductance, input voltage, comparator hysteresis, and loop latency. An advantage of this hysteretic control approach is the unconditional stability of the control loop.
The Continuous Mode Signal Example shows the continuous mode signals and light output for a red, green, and blue bit slice. The signals, including LED_SEL(3:0), D_EN, S_EN1, and S_EN2, are sent from the DLPC23xS-Q1.
Figure 6-4 Continuous Mode Signal ExampleIn continuous mode, dimming is accomplished through a combination of amplitude/flux dimming and pulse time attenuation. Amplitude dimming is done by adjusting the photo feedback DAC output and TIA feedback gain. Time attenuation is accomplished by adjusting the length of shunt enable (S_EN from DLPC23xS-Q1) and drive enable (D_EN from DLPC23xS-Q1) (see Figure 6-5). Figure 6-5 shows an example with a 100% bit and a bit with time and amplitude attenuation to achieve 32:1 dimming. Figure 6-6 is a more generic example showing how many different dimming levels can be achieved with combinations of time and amplitude dimming.
Figure 6-5 Continuous Mode Dimming Illustration 1
Figure 6-6 Continuous Mode Dimming Illustration 2