ZHCSF00A April 2016 – May 2016 TPS7B4254-Q1
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 修訂歷史記錄
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3 Feature Description
- 7.4 Device Functional Modes
- 8 Application and Implementation
- 9 Power Supply Recommendations
- 10Layout
- 11器件和文檔支持
- 12機械、封裝和可訂購信息
8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
8.1 Application Information
The TPS7B4254-Q1 device is a 150-mA low-dropout tracking regulator with ultralow tracking tolerance. The PSpice transient model is available for download on the product folder and can be used to evaluate the basic function of the device.
8.2 Typical Applications
8.2.1 Application With Output Voltage Equal to the Reference Voltage
Figure 27 shows a typical application circuit for the TPS7B4254-Q1 device. Different values of external components can be used, depending on the end application. An application may require a larger output capacitor during fast load steps to prevent a large drop on the output voltage. TI recommends using a low-ESR ceramic capacitor with a dielectric of type X5R or X7R.
Figure 27. Output Voltage Equals the Reference Voltage
8.2.1.1 Design Requirements
For this design example, use the parameters listed in Table 1 as the design parameters.
Table 1. Design Parameters
| DESIGN PARAMETER | EXAMPLE VALUE |
|---|---|
| Input voltage | 4 V to 40 V |
| Output voltage | 2 V to 40 V |
| ADJ voltage | 2 V to 18 V |
| Output capacitor | 10 µF to 500 µF |
| Output capacitor ESR range | 0.001 Ω to 20 Ω |
8.2.1.2 Detailed Design Procedure
To begin the design process, determine the following:
- Input voltage range
- Output voltage
- Reference voltage
- Output current
- Current limit
8.2.1.2.1 Input Capacitor
The device requires an input decoupling capacitor, the value of which depends on the application. The typical recommended value for the decoupling capacitor is 10 μF with a 0.1 µF ceramic bypass capacitor in parallel. The voltage rating must be greater than the maximum input voltage.
8.2.1.2.2 Output Capacitor
To ensure the stability of the TPS7B4254-Q1 device, the device requires an output capacitor with a value in the range from 10 μF to 500 μF and with an ESR range from 0.001 Ω to 20 Ω when the FB pin is directly connected to the OUT pin. TI recommends selecting a ceramic capacitor with low ESR to improve the load transient response.
To achieve an output voltage higher than the reference voltage, a resistor divider is connected between the OUT pin and the FB pin. In this case, a 47-nF feedforward capacitor must be connected between the OUT and FB pins for loop stability. The ESR of the output capacitor must be from 0.001 Ω to 10 Ω.
When multiple capacitors (two or more) are connected in parallel at the OUT pin, the ESR range of each output capacitor must be from 0.001 Ω to 3 Ω for loop stability.
In case the FB pin is shorted to ground, the TPS7B4254-Q1 device functions as a power switch with no need for the output capacitor.
8.2.1.3 Application Curve
8.2.2 High-Accuracy LDO
With an accurate voltage rail, the TPS7B4254-Q1 device can be used as an LDO with ultrahigh-accuracy output voltage by configuring the device as shown in Figure 29.
Figure 29. High-Accuracy LDO Application
For example, assume the reference voltage is a 5-V rail with 0.1% accuracy. Because the tracking accuracy between the ADJ and OUT pins is specified below 4 mV across temperature, the output accuracy of the TPS7B4254-Q1 device can be calculated with Equation 4.
