ZHCSI96J March 2010 – March 2020 TPS7A60-Q1 , TPS7A61-Q1
PRODUCTION DATA.
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| INPUT VOLTAGE (VIN PIN) | ||||||
| VIN | Input voltage | Fixed 5-V or 3.3-V output, IOUT = 1 mA | 7(1) | 40 | V | |
| IQUIESCENT | Quiescent current | VIN = 8.2 V to 18 V, VENABLE(2) = 5 V,
IOUT = 0.01 mA to 0.75 mA |
25 | 40 | µA | |
| ISLEEP(2) | Sleep or shutdown current | VIN = 8.2 V to 18 V, VENABLE(2) < 0.8 V,
IOUT = 0 mA (no load), TA = 125°C |
3 | µA | ||
| VIN-UVLO | Undervoltage lockout voltage | Ramp VINdown until output is turned OFF | 3.16 | V | ||
| VIN(POWERUP) | Power-up voltage | Ramp VINup until output is turned ON | 3.45 | V | ||
| ENABLE INPUT (ENABLE PIN) | ||||||
| VIL(2) | Logic input low level | 0 | 0.8 | V | ||
| VIH(2) | Logic input high level | 2.5 | 40 | V | ||
| REGULATED OUTPUT VOLTAGE (VOUT PIN) | ||||||
| VOUT | Regulated output voltage | Fixed VOUT value (3.3 V or 5 V as applicable),
IOUT = 10 mA to 300 mA, VIN= VOUT + 1 V to 16 V |
–2% | 2% | ||
| ?VLINE-REG | Line regulation | VIN = 6 V to 28 V, IOUT = 10 mA, VOUT = 5 V | 15 | mV | ||
| VIN = 6 V to 28 V, IOUT = 10 mA, VOUT = 3.3 V | 20 | mV | ||||
| ?VLOAD-REG | Load regulation | IOUT = 10 mA to 300 mA, VIN= 14 V, VOUT = 5 V | 25 | mV | ||
| IOUT = 10 mA to 300 mA, VIN = 14 V, VOUT = 3.3 V | 35 | mV | ||||
| VDROPOUT(2) | Dropout voltage
(VIN – VOUT) |
IOUT = 250 mA | 500 | mV | ||
| IOUT = 150 mA | 300 | mV | ||||
| RSW | Switch resistance | VIN to VOUT resistance | 2 | Ω | ||
| ICL | Output current limit | VOUT = 0 V (VOUT pin is shorted to ground) | 350 | 1000 | mA | |
| PSRR | Power supply ripple rejection | VIN-RIPPLE = 0.5 Vpp, IOUT = 300 mA, frequency = 100 Hz, VOUT = 5 V and VOUT = 3.3 V | 60 | dB | ||
| VIN-RIPPLE = 0.5 Vpp, IOUT = 300 mA, frequency = 150 kHz, VOUT = 5 V and VOUT = 3.3 V | 30 | |||||
| RESET (nRST PIN) | ||||||
| VOL | Reset pulled low | IOL = 5 mA | 0.4 | V | ||
| IOH | Leakage current | Reset pulled to VOUT through 5-kΩ resistor | 1 | µA | ||
| VTH(POR) | Power-on-reset threshold | VOUT power up above internally set tolerance,
VOUT = 5 V |
4.5 | 4.65 | 4.77 | V |
| VOUT power up above internally set tolerance,
VOUT = 3.3 V |
3.07 | |||||
| UVTHRES | Reset threshold | VOUT falling below internally set tolerance,
VOUT = 5 V |
4.5 | 4.65 | 4.77 | V |
| VOUT falling below internally set tolerance,
VOUT = 3.3 V |
3.07 | |||||
| RESET DELAY (RDELAY PIN) | ||||||
| VTH(RDELAY)(3) | Threshold to release nRST high | Voltage at RDELAY pin is ramped up. | 3 | 3.3 | V | |
| IDLY(3) | Delay capacitor charging current | 0.75 | 1 | 1.25 | µA | |
| IOL(3) | Delay capacitor discharging current | Voltage at RDELAY pin = 1 V | 5 | mA | ||
| OPERATING TEMPERATURE RANGE | ||||||
| TJ | Operating junction temperature | –40 | 150 | ºC | ||
| TSHUTDOWN | Thermal shutdown trip point | 165 | ºC | |||
| THYST | Thermal shutdown hysteresis | 10 | ºC | |||