ZHCSI93D May 2018 – October 2022 TPS65987D
PRODUCTION DATA
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 Pin Configuration and Functions
-
6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Thermal Information
- 6.5 Power Supply Requirements and Characteristics
- 6.6 Power Consumption Characteristics
- 6.7 Power Switch Characteristics
- 6.8 Cable Detection Characteristics
- 6.9 USB-PD Baseband Signal Requirements and Characteristics
- 6.10 BC1.2 Characteristics
- 6.11 Thermal Shutdown Characteristics
- 6.12 Oscillator Characteristics
- 6.13 I/O Characteristics
- 6.14 PWM Driver Characteristics
- 6.15 I2C Requirements and Characteristics
- 6.16 SPI Controller Timing Requirements
- 6.17 HPD Timing Requirements
- 6.18 Typical Characteristics
- 7 Parameter Measurement Information
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 USB-PD Physical Layer
- 8.3.2 Power Management
- 8.3.3 Port Power Switches
- 8.3.4 Cable Plug and Orientation Detection
- 8.3.5 Dead Battery Operation
- 8.3.6 Battery Charger Detection and Advertisement
- 8.3.7 ADC
- 8.3.8 DisplayPort HPD
- 8.3.9 Digital Interfaces
- 8.3.10 PWM Driver
- 8.3.11 Digital Core
- 8.3.12 I2C Interfaces
- 8.3.13 SPI Controller Interface
- 8.3.14 Thermal Shutdown
- 8.3.15 Oscillators
- 8.4 Device Functional Modes
-
9 Application and Implementation
- 9.1 Application Information
- 9.2
Typical Application
- 9.2.1 Type-C VBUS Design Considerations
- 9.2.2 Notebook Design Supporting PD Charging
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
8.3.12.5 I2C Pin Address Setting (ADCIN2)
To enable the setting of multiple I2C addresses using a single TPS65987D pin, a resistor divider is placed externally on the ADCIN2 pin. The internal ADC then decodes the address from this divider value. Figure 8-29 shows the decoding.
Figure 8-29 I2C Address DividerTable 8-4 lists the external divider needed to set bits [3:1] of the I2C Unique Address.
Table 8-4 I2C Address Selection
| DIV = R2/(R1+R2)(1) | I2C UNIQUE ADDRESS [3:1] | |
|---|---|---|
| DIV_min | DIV_max | I2C_ADDR_DECODE |
| 0.00 | 0.18 | 000b |
| 0.20 | 0.38 | 001b |
| 0.40 | 0.58 | 010b |
| 0.60 | 1.00 | 011b |
(1) External resistor tolerance of
1% is required. Resistor values must be chosen to yield a DIV value centered
nominally between listed MIN and MAX values.