ZHCSD04E November 2014 – March 2022 TPS65400
PRODUCTION DATA
The VREF_TRANSITION_RATE command determines the stepping rate and stepping size when dynamically switching the reference voltage VREF of the selected output.
| BITS | NAME | READ / WRITE | DEFAULT VALUE | BINARY VALUE | VALUE | MEANING |
|---|---|---|---|---|---|---|
| 7 | VREF_RAMP_ENABLE | R/W | 1 | 0 | — | Ramping disabled |
| 1 | — | Ramping enabled | ||||
| 6 | — | R | 0 | — | — | — |
| 5:3 | VREF_RAMP_TIMESTEP | R/W | 011 | 000 | 1 μs | Delay time per ramping step |
| 001 | 2 μs | |||||
| 010 | 3 μs | |||||
| 011 | 4 μs | |||||
| 100 | 6 μs | |||||
| 101 | 8 μs | |||||
| 110 | 12 μs | |||||
| 111 | 16 μs | |||||
| 2:0 | VREF_RAMP_BITSTEP | R/W | 000 | See Table 8-37 | See Table 8-37 | Ramp up and ramp down LSB increments / decrements |
| VREF_RAMP_BITSTEP BINARY VALUE | RAMP UP (LSB increments) | RAMP DOWN (LSB decrements) |
|---|---|---|
| 000 (default) | 1 | 1 |
| 001 | 2 | 1 |
| 010 | 4 | 2 |
| 011 | 6 | 3 |
| 100 | 8 | 4 |
| 101 | 10 | 5 |
| 110 | 12 | 6 |
| 111 | 16 | 8 |
VREF_RAMP_BITSTEP sets the amount of voltage reference bits to ramp up and ramp down per VREF_RAMP_TIMESTEP time. During ramping, if the target step is less than or equal to the VREF_RAMP_BITSTEP setting, ramping reduces to a fine voltage step of 1 LSB per VREF_RAMP_TIMESTEP time until the target voltage has been reached. For the actual voltage change per LSB, refer to (D8h) VREF_COMMAND.
PAGE support is for outputs 0x00 through 0x03.