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ZHCSEL9B december 2015 – may 2023 TPS65265

PRODUCTION DATA

封裝選項(xiàng)

機(jī)械數(shù)據(jù) (封裝 | 引腳)

RHB|32
- MPQF130D

散熱焊盤(pán)機(jī)械數(shù)據(jù) (封裝 | 引腳)

RHB|32
- QFND029X

訂購(gòu)信息

7.5 Electrical Characteristics

T_J = –40°C to 125°C, typical values are at T_J = 25°C (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
INPUT SUPPLY VOLTAGE
V_IN	Input voltage range		4.5		17	V
UVLO	VIN undervoltage lockout	VIN rising	3.6	3.8	4	V
		VIN falling	3.0	3.2	3.4	V
		Hysteresis		600		mV
IDD_SDN	Shutdown supply current	PVIN = 12 V, EN1 = EN2 = EN3 = MODE = 0 V	9	11.5	14	μA
IDD_{Q_NSW}	Input quiescent current without buck1/2/3 switching	EN1 = EN2 = EN3 = 5 V, FB1 = FB2 = FB3 = 0.8 V	550	680	800	μA
IDD_{Q_NSW1}		EN1 = 5 V, EN2 = EN3 = 0 V, FB1 = 0.8 V	280	350	425	μA
IDD_{Q_NSW2}		EN2 = 5 V, EN1 = EN3 = 0 V, FB2 = 0.8 V	280	350	425	μA
IDD_{Q_NSW3}		EN3 = 5 V, EN1 = EN2 = 0 V, FB3 = 0.8 V	280	350	425	μA
V_7V	V7V LDO output voltage	PVIN1 = 12 V, V_7V load current = 0 A	5.9	6.1	6.3	V
I_{OCP_V7V}	V7V LDO current limit		110	177	235	mA
FEEDBACK VOLTAGE REFERENCE
V_FB	Feedback voltage	V_COMP = 1.2 V	0.592	0.6	0.608	V
Buck1, Buck2, Buck3
V_ENXH	EN1/2/3 high-level input voltage		1.08	1.15	1.22	V
V_ENXL	EN1/2/3 low-level input voltage		1.06	1.12	1.17	V
I_ENX1	EN1/2/3 pullup current	ENx = 1 V	2.3	2.9	3.4	μA
I_ENX2	EN1/2/3 pullup current	ENx = 1.5 V	5.1	6	6.8	μA
I_ENhys	hysteresis current			3.1		μA
t_{ON_MIN}	Minimum on time	I_load = 100 mA		75	120	ns
G_{m_EA}	Error amplifier transconductance	–2 μA < I_COMPX < 2 μA	174	350	530	μS
G_{m_PS1/2/3}	COMP1/2/3 voltage to inductor current G_m⁽¹⁾	I_LX = 0.5 A		12		A/V
I_LIMIT1	buck1 peak inductor current limit		6.0	8.0	9.6	A
I_LIMITSOURCE1	buck1 low-side source current limit		5.3	7.7	10	A
I_LIMITSINK1	buck1 low-side sink current limit			1.4		A
I_LIMIT2	buck2 peak inductor current limit		3.85	5.2	6.65	A
I_LIMITSOURCE2	buck2 low-side source current limit		3	4.8	5.5	A
I_LIMITSINK2	buck2 low-side sink current limit			1.2		A
I_LIMIT3	buck3 peak inductor current limit		2.6	3.6	4.45	A
I_LIMITSOURCE3	buck3 low-side source current limit		2.6	3.7	4.6	A
I_LIMITSINK3	buck3 low-side sink current limit			1.2		A
t_{Hiccup_wait}	Overcurrent wait time⁽¹⁾			256		cycles
t_{Hiccup_re}	Hiccup time before restart⁽¹⁾			8192		cycles
R_{dson_HS1}	buck1 high-side switch resistance	PVIN = 12 V		39		m?
R_{dson_LS1}	buck1 low-side switch resistance	PVIN = 12 V		25		m?
R_{dson_HS2}	buck2 high-side switch resistance	PVIN = 12 V		52		m?
R_{dson_LS2}	buck2 low-side switch resistance	PVIN = 12 V		43		m?
R_{dson_HS3}	buck3 high-side switch resistance	PVIN = 12 V		70		m?
R_{dson_LS3}	buck3 low-side switch resistance	PVIN = 12 V		65		m?
PGOOD, MODE, PSM, SEQ_DLY, PG_DLY
V_{th_PG}	Feedback voltage threshold	FBx undervoltage falling		92.5		%VREF
		FBx undervoltage rising		95		%VREF
		FBx overvoltage rising		107.5		%VREF
		FBx overvoltage falling		105		%VREF
t_{DEGLITCH(PG)_F}	PGOOD falling edge deglitch time			256		cycles
t_{DEGLITCH(PG)_R}	PGOOD rising edge deglitch time			256		cycles
I_PG	PGOOD pin leakage				0.08	μA
V_{LOW_PG}	PGOOD pin low voltage	PVIN1 = 12 V, I_SINK = 1 mA			0.25	V
V_{MODE_H}	MODE high level input voltage		2.4	2.6	2.8	V
V_{MODE_L}	MODE low level input voltage		0.11	0.16	0.23	V
V_{PG_DLYTH}	PG_DLY threshold		1.4	1.5	1.6	V
I_{PG_DLY}	PG_DLY pullup current	PG_DLY = 0.5 V	2.0	3.0	4.1	μA
V_{SEQ_DLYTH1}	SEQ_DLY threshold		0.7	0.75	0.8	V
V_{SEQ_DLYTH2}	SEQ_DLY threshold		1.4	1.5	1.58	V
I_{SEQ_DLY}	SEQ_DLY pullup current	SEQ_DLY = 0.5 V	2	3	4.1	μA
V_PSMH	PSM pin high level input voltage		1.3	1.4	1.55	V
V_PSML	PSM pin low level input voltage		1	1.1	1.2	V
OSCILLATOR
F_SW	Switching frequency	R_OSC = 82.5 k?	580	610	640	kHz
F_{SW_range}	Switching frequency		250		2300	kHz
t_{SYNC_w}	Clock sync minimum pulse width		80			ns
F_{SYNC_HI}	Clock sync high threshold				2	V
V_{SYNC_LO}	Clock sync low threshold		0.4			V
THERMAL PROTECTION
T_{TRIP_OTP}	Thermal protection trip point⁽¹⁾	Temperature rising		160		°C
T_{HYST_OTP}		Hysteresis		20		°C

(1) Lab validation result