ZHCSNM6A May 2021 – August 2021 TPS6521855
PRODUCTION DATA
The device has two GPIOs and one GPO pin, which are configured as follows:
| IO1_SEL (EEPROM) |
GPO1 (USER BIT) |
PGOOD (PMIC SIGNAL) |
GPIO1 (I/O PIN) |
COMMENTS |
|---|---|---|---|---|
| 0 | 0 | X | 0 | Open-drain output, driving low |
| 0 | 1 | X | HiZ | Open-drain output, HiZ |
| 1 | X | 0 | X | Pin is configured as input and intended as DDR RESET signal. Coming out of POR, GPO2 is driven low. Otherwise, GPO2 status is latched at falling edge of PGOOD. See GUID-5D275BBF-C961-4150-89EC-9678CFFBC712.html#SLDS2061311. |
| 1 | X | 1 | 0 | Pin is configured as input and intended as DDR RESET signal. GPO2 is driven low. |
| 1 | X | 1 | 1 | Pin is configured as input and intended as DDR RESET signal. GPO2 is driven high. |
| IO1_SEL (EEPROM) |
GPO2_BUF (EEPROM) |
GPO2 (USER BIT) |
COMMENTS |
|---|---|---|---|
| 0 | 0 | 0 | GPO2 is open drain output controlled by GPO2 user bit (driving low). |
| 0 | 0 | 1 | GPO2 is open drain output controlled by GPO2 user bit (HiZ). |
| 0 | 1 | 0 | GPO2 is push-pull output controlled by GPO2 user bit (driving low). |
| 0 | 1 | 1 | GPO2 is push-pull output controlled by GPO2 user bit (driving high). |
| 1 | 0 | X | GPO2 is open drain output controlled by GPIO1 and PGOOD. |
| 1 | 1 | X | GPO2 is push-pull output controlled by GPIO1 and PGOOD. |
| DC12_RST (EEPROM) |
GPO3
(USER BIT) |
GPIO3
(I/O PIN) |
COMMENTS |
|---|---|---|---|
| 0 | 0 | 0 | Open-drain output, driving low |
| 0 | 1 | HiZ | Open-drain output, HiZ |
| 1 | X | Active low | GPIO3 is DCDC1 and DCDC2 reset input signal to PMIC (active low). See GUID-5D275BBF-C961-4150-89EC-9678CFFBC712.html#GUID-5D275BBF-C961-4150-89EC-9678CFFBC712 for details. |