ZHCS165B April 2011 – October 2014 TPS55010
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 簡化電路原理圖
- 5 修訂歷史記錄
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 Fixed Frequency PWM Control
- 8.3.2 Half Bridge and Bootstrap Voltage
- 8.3.3 Error Amplifier
- 8.3.4 Voltage Reference
- 8.3.5 Adjusting the Output Voltage
- 8.3.6 Enable and Adjusting Undervoltage Lockout
- 8.3.7 Adjusting Slow Start Time
- 8.3.8 Constant Switching Frequency and Timing Resistor (RT/CLK Pin)
- 8.3.9 How to Interface to RT/CLK Pin
- 8.3.10 Overcurrent Protection
- 8.3.11 Reverse Overcurrent Protection
- 8.3.12 FAULT Pin
- 8.3.13 Thermal Shutdown
- 8.4 Device Functional Modes
-
9 Application And Implementation
- 9.1 Application Information
- 9.2
Typical Applications
- 9.2.1 Design Guide - Step-by-Step Design Procedure
- 9.2.2 Primary Side Voltage
- 9.2.3 Voltage Feedback
- 9.2.4 Selecting the Switching Frequency and Primary Inductance
- 9.2.5 Primary Side Capacitor
- 9.2.6 Secondary Side Diode
- 9.2.7 Secondary Side Capacitor
- 9.2.8 Input Capacitor
- 9.2.9 Y - Capacitor
- 9.2.10 Slow Start Capacitor
- 9.2.11 Bootstrap Capacitor Selection
- 9.2.12 UVLO Resistors
- 9.2.13 Compensation
- 9.2.14 Design Tips
- 9.2.15 How to Specify a Fly-Buck Transformer
- 9.2.16 Application Curves
- 9.3 Typical Application, Dual Output
- 10Power Supply Recommendations
- 11Layout
- 12器件和文檔支持
- 13機械封裝和可訂購信息
6 Pin Configuration and Functions
RTE PACKAGE
(TOP VIEW)
Pin Functions
| Name | Number | Description |
|---|---|---|
| VIN | 1, 2, 16 | Supplies the control circuitry and switches of the power converter. |
| GND | 3, 4, 5 | Power Ground. This pin should be electrically connected directly to the thermal pad under the IC. |
| VSENSE | 6 | Inverting node of the transconductance error amplifier. |
| COMP | 7 | Error amplifier output, and input to the output switch current comparator. Connect frequency compensation components to this pin. |
| RT/CLK | 8 | Resistor Timing and External Clock. An internal amplifier holds this pin at a fixed voltage when using an external resistor to ground to set the switching frequency. If the pin is pulled above the PLL upper threshold, a mode change occurs and the pin becomes a synchronization input. The internal amplifier is disabled and the pin is a high impedance clock input to the internal PLL. If clocking edges stop, the internal amplifier is re-enabled and the mode returns to a resistor set function. |
| SS | 9 | Slow-start. An external capacitor connected to this pin sets the output rise time. |
| PH | 10, 11, 12 | The source of the internal high side power MOSFET, and drain of the internal low side MOSFET. |
| BOOT | 13 | A bootstrap capacitor is required between BOOT and PH. If the voltage on this capacitor is below the minimum required by the output device, the output is forced to switch off until the capacitor is refreshed. |
| FAULT | 14 | An open drain output. Active low if the output voltage is low due to thermal shutdown, dropout, overvoltage or EN shut down. |
| EN | 15 | Enable pin, internal pull-up current source. Pull below 1.2V to disable. Float to enable. Adjust the input undervoltage lockout with two resistors. |
| THERMAL PAD | 17 | GND pin should be connected to the exposed thermal pad for proper operation. This thermal pad should be connected to any internal PCB ground plane using multiple vias for good thermal performance. |