ZHCSQY3 march 2023 TPS546D24S
PRODUCTION DATA
| CMD Address | 4Ah |
| Write Transaction: | Write Word |
| Read Transaction: | Read Word |
| Format: | SLINEAR11 per CAPABILITY |
| Phased: | Yes |
| NVM Back-up: | EEPROM or Pin Detection |
| Updates: | On-the-fly |
The IOUT_OC_WARN_LIMIT command sets the value of the output current, in amperes, that causes the overcurrent detector to indicate an overcurrent warning condition. The units are amperes.
IOUT_OC_WARN_LIMIT is a phased command. Each phase will report an output current overcurrent warning independently.
In response to an overcurrent warning condition, the TPS546D24S takes the following action:
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RW | RW | RW | RW | RW | RW | RW | RW |
| IOOCW_EXP | IOOCW_MAN | ||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RW | RW | RW | RW | RW | RW | RW | RW |
| IOOCW_MAN | |||||||
| LEGEND: R/W = Read/Write; R = Read only |
| Bit | Field | Access | Reset | Description |
|---|---|---|---|---|
| 15:11 | IOOCW_ EXP | RW | 11110b | Linear format two’s complement exponent |
| 10:0 | IOOCW_ MAN | RW | NVM | Linear format two’s complement mantissa Supported values up to 62 A times the number of phases. |
Attempts to write (4Ah) IOUT_OC_WARN_LIMIT to any value outside those specified as valid will be considered invalid/unsupported data and cause the TPS546D24S to respond by flagging the appropriate status bits and notifying the host according to the PMBus 1.3.1 Part II specification section 10.9.3.
Command Resolution and NVM Store/Restore Behavior
The Per-PHASE (PHASE != FFh) IOUT_OC_WARN_LIMIT is implemented in analog hardware. The analog hardware supports current limits from 8 A to 62 A in 2-A steps. Programmed values not exactly equal to hardware supported values will be rounded up to the next available supported value. Values less than 8 A per device can be written to IOUT_OC_FAULT_LIMIT, but values less than 8 A per device will be implemented as 8 A in hardware. The TPS546D24S provides only limited NVM-backed options for this command. Following a power-cycle or NVM Store/Restore operation, the value will be rounded to the nearest NVM supported value. The NVM supports values up to 62 A in 0.25-A steps.