ZHCSHA3D NOVEMBER 2009 – March 2018 TPS40303 , TPS40304 , TPS40305
PRODUCTION DATA.
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 修訂歷史記錄
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Detailed Description
-
8 Application and Implementation
- 8.1 Application Information
- 8.2
Typical Applications
- 8.2.1
Using the TPS40305 for a 12-V to 1.8-V Point-of-Load Synchronous Buck Regulator
- 8.2.1.1 Design Requirements
- 8.2.1.2
Detailed Design Procedure
- 8.2.1.2.1 Custom Design With WEBENCH® Tools
- 8.2.1.2.2 Selecting the Switching Frequency
- 8.2.1.2.3 Inductor Selection (L1)
- 8.2.1.2.4 Output Capacitor Selection (C12)
- 8.2.1.2.5 Peak Current Rating of Inductor
- 8.2.1.2.6 Input Capacitor Selection (C8)
- 8.2.1.2.7 MOSFET Switch Selection (Q1 and Q2)
- 8.2.1.2.8 Bootstrap Capacitor (C6)
- 8.2.1.2.9 VDD Bypass Capacitor (C7)
- 8.2.1.2.10 BP Bypass Capacitor (C5)
- 8.2.1.2.11 Short-Circuit Protection (R11)
- 8.2.1.2.12 Feedback Divider (R4, R5)
- 8.2.1.2.13 Compensation: (C2, C3, C4, R3, R6)
- 8.2.1.3 Application Curves
- 8.2.2
A High-Current, Low-Voltage Design Using the TPS40304
- 8.2.2.1 Design Requirements
- 8.2.2.2
Detailed Design Procedure
- 8.2.2.2.1 Selecting the Switching Frequency
- 8.2.2.2.2 Inductor Selection (L1)
- 8.2.2.2.3 Output Capacitor Selection (C12)
- 8.2.2.2.4 Peak Current Rating of Inductor
- 8.2.2.2.5 Input Capacitor Selection (C8)
- 8.2.2.2.6 MOSFET Switch Selection (Q1 and Q2)
- 8.2.2.2.7 Bootstrap Capacitor (C6)
- 8.2.2.2.8 VDD Bypass Capacitor (C7)
- 8.2.2.2.9 BP Bypass Capacitor (C5)
- 8.2.2.2.10 Short-Circuit Protection (R11)
- 8.2.2.2.11 Feedback Divider (R4, R5)
- 8.2.2.2.12 Compensation: (C2, C3, C4, R3, R6)
- 8.2.2.3 Application Curves
- 8.2.3
A Synchronous Buck Application Using the TPS40303
- 8.2.3.1 Design Requirements
- 8.2.3.2
Detailed Design Procedure
- 8.2.3.2.1 Selecting the Switching Frequency
- 8.2.3.2.2 Inductor Selection (L1)
- 8.2.3.2.3 Output Capacitor Selection (C12)
- 8.2.3.2.4 Peak Current Rating of Inductor
- 8.2.3.2.5 Input Capacitor Selection (C8)
- 8.2.3.2.6 MOSFET Switch Selection (Q1 and Q2)
- 8.2.3.2.7 Bootstrap Capacitor (C6)
- 8.2.3.2.8 VDD Bypass Capacitor (C7)
- 8.2.3.2.9 BP Bypass Capacitor (C5)
- 8.2.3.2.10 Short-Circuit Protection (R11)
- 8.2.3.2.11 Feedback Divider (R4, R5)
- 8.2.3.2.12 Compensation: (C2, C3, C4, R3, R6)
- 8.2.3.3 Application Curves
- 8.2.1
Using the TPS40305 for a 12-V to 1.8-V Point-of-Load Synchronous Buck Regulator
- 9 Power Supply Recommendations
- 10Layout
- 11器件和文檔支持
- 12機(jī)械、封裝和可訂購信息
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- DRC|10
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
- DRC|10
訂購信息
7.3.3 Soft-Start Time
The soft-start time of the TPS4030x is user programmable by selecting a single capacitor. The EN/SS pin sources 10 µA to charge this capacitor. The actual output ramp-up time is the amount of time that it takes for the 10 µA to charge the capacitor through a 600-mV range. There is some initial lag due to calibration and an offset (800 mV) from the actual EN/SS pin voltage to the voltage applied to the error amplifier.
The soft-start is done in a closed-loop fashion, meaning that the error amplifier controls the output voltage at all times during the soft-start period and the feedback loop is never open as occurs in duty cycle limit soft-start schemes. The error amplifier has two non-inverting inputs, one connected to the 600-mV reference voltage, and the other connected to the offset EN/SS pin voltage. The lower of these two voltages is what the error amplifier controls the FB pin. As the voltage on the EN/SS pin ramps up past approximately 1.4 V (800-mV offset voltage plus the 600 mV reference voltage), the 600-mV reference voltage becomes the dominant input and the converter has reached its final regulation voltage.
The capacitor required for a given soft-start ramp time for the output voltage is given by Equation 1.
where
- CSS is the required capacitance on the EN/SS pin. (F)
- ISS is the soft-start source current (10 µA).
- VFB is the feedback reference voltage (0.6 V).
- tSS is the desired soft-start ramp time (s).