SLVSBR5C December 2012 – June 2015 TPS27082L
PRODUCTION DATA.

| PIN | I/O | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| GND | 1 | I | Connect to the system GND |
| VOUT | 2 | O | Drain Terminal of Power PFET (Q1) – If required, connect a slew control capacitor between pins VOUT and R1/C |
| 3 | |||
| VIN | 4 | I | Source Terminal of Power PFET (Q1) – connect a pull-up resistor between the pins VIN and R1/C1 |
| ON/OFF | 5 | I | Active high enable – when driven with a high impedance driver, connect an external pull down resistor to GND |
| R1/C1 | 6 | I | Gate Terminal of Power PFET (Q1) |