ZHCSNE6 August 2021 TPS1653
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | NOM | MAX | UNIT | |
|---|---|---|---|---|---|---|
| UVLO INPUT (UVLO) | ||||||
| UVLO_ton(dly) | UVLO switch turnon delay | UVLO↑ (100 mV above V(UVLOR)) to V(OUT) = 100 mV, C(dVdT) ≥ 10 nF, [C(dVdT) in nF] | 742 + 49.5 x C(dVdT) | μs | ||
| UVLO_toff(dly) | UVLO switch turnoff delay | UVLO↓(20 mV below V(UVLOF)) to FLT↓ | 9 | 11 | 16 | μs |
| tUVLO_FLTdly) | UVLO to fault de-assertion delay | UVLO↑ to FLT ↑ delay | 500 | 617 | 700 | μs |
| ENABLE INPUT (EN) | ||||||
| EN_tOFF(dly) | Enable turn-off delay | EN↑ (20 mV above V(OVPR)) to FLT↓ | 8.5 | 11 | 14 | μs |
| EN_ton(dly) | Enable turn-on delay | EN↓ (100 mV below V(OVPF)) to FET ON C(dVdT) ≥ 10 nF, [C(dVdT) in nF] | 150 + 49.5 x C(dVdT) | μs | ||
| SHUTDOWN CONTROL INPUT (SHDN) | ||||||
| tSD(dly) | SHUTDOWN entry delay | SHDN↓ (below V(SHUTF)) to FET OFF | 0.8 | 1 | 1.5 | μs |
| CURRENT LIMIT | ||||||
| tFASTTRIP(dly) | Hot-short response time | I(OUT) > I(SCP) | 1 | μs | ||
| tFASTTRIP(dly) | Soft short response | I(FASTTRIP) < I(OUT) < I(SCP) | 2.2 | 3.2 | 4.5 | μs |
| tCL_ILIM(dly) | Maximum duration in current limit | 129 | 162 | 202 | ms | |
| tCB(dly) | Maximum duration in 2x Pulse current limiting | I(OL) < I(OUT) ≤ I(2xOL) | 20 | 25.5 | 31 | ms |
| tCL_ILIM_FLT(dly) | FLT delay in current limit | 1.09 | 1.3 | 1.6 | ms | |
| OUTPUT RAMP CONTROL (dVdT) | ||||||
| t(FASTCHARGE) | Output ramp time in fast charging | C(dVdT) = Open, 10% to 90% V(OUT), C(OUT) = 1 μF; V(IN) = 24V | 350 | 495 | 700 | μs |
| t(dVdT) | Output ramp time | C(dVdT) = 22 nF, 10% to 90% V(OUT), V(IN) = 24V | 8.35 | ms | ||
| POWER GOOD (PGOOD) | ||||||
| tPGOODR | PGOOD delay (deglitch) time | Rising edge | 8 | 11.5 | 13 | ms |
| tPGOODF | PGOOD delay (deglitch) time | Falling edge | 8 | 10 | 13 | ms |
| FAULT FLAG (FLT) | ||||||
| tCB_FLT(dly) | FLT assertion delay in Pulse over current limiting | Delay from I(OUT) > I(OL) to FLT↓. | 22 | 25.5 | 30 | ms |
| THERMAL PROTECTION | ||||||
| t(TSD_retry) | Retry delay in TSD | MODE = GND | 500 | 648 | 800 | ms |
| t(Treg_timeout) | Thermal Regulation timeout | 1 | 1.3 | 1.6 | s | |