ZHCSAP5E December 2012 – October 2024 TPD4E1B06
PRODUCTION DATA
- 1
- 1 特性
- 2 應用
- 3 說明
- 4 Pin Configuration and Functions
- 5 Specifications
- 6 Detailed Description
- 7 Application and Implementation
- 8 Device and Documentation Support
- 9 Revision History
- 10Mechanical, Packaging, and Orderable Information
7.3.2 Layout Examples
Figure 7-3 shows a layout example for theTPD4E1B06DCK. Pins 1 and 2 and 4 and 5 are routed differentially. Pin 3 is routed to the ground plane. Pin 6 does not have an internal connection in the device and does not need to be routed anywhere on the board. It is also acceptable to connect pin 6 to the ground plane.
Figure 7-3 DCK Layout Example Showing Two Data Pairs, D0 and D1Figure 7-4 shows a layout example for theTPD4E1B06DRL. Pins 1 and 6 and 3 and 4 are routed differentially. Pin 2 is routed to the ground plane. Pin 5 does not have an internal connection in the device and does not need to be routed anywhere on the board. It is also acceptable to connect pin 5 to the ground plane.
Figure 7-4 DRL Layout Example Showing Two Data Pairs, D0 and D1