ZHCSEN2A November 2015 – February 2016 TPD4E02B04
PRODUCTION DATA.
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 修訂歷史記錄
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 IEC 61000-4-2 ESD Protection
- 7.3.2 IEC 61000-4-4 EFT Protection
- 7.3.3 IEC 61000-4-5 Surge Protection
- 7.3.4 IO Capacitance
- 7.3.5 DC Breakdown Voltage
- 7.3.6 Ultra Low Leakage Current
- 7.3.7 Low ESD Clamping Voltage
- 7.3.8 Supports High Speed Interfaces
- 7.3.9 Industrial Temperature Range
- 7.3.10 Easy Flow-Through Routing Package
- 7.4 Device Functional Modes
- 8 Application and Implementation
- 9 Power Supply Recommendations
- 10Layout
- 11器件和文檔支持
- 12機(jī)械、封裝和可訂購信息
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- DQA|10
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
- DQA|10
訂購信息
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| Electrical Fast Transient | IEC 61000-4-5 (5/50 ns) | 80 | A | |
| Peak Pulse | IEC 61000-4-5 Power (tp - 8/20 µs) | 17 | W | |
| IEC 61000-4-5 Current (tp - 8/20 µs) | 2 | A | ||
| TA | Operating free-air temperature | –40 | 125 | °C |
| Tstg | Storage temperature | –65 | 155 | °C |
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
| VALUE | UNIT | |||
|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2500 | V |
| Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±1000 | |||
| IEC 61000-4-2 contact discharge | ±12000 | |||
| IEC 61000-4-2 air-gap discharge | ±15000 | |||
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| VIO | Input pin voltage | –3.6 | 3.6 | V |
| TA | Operating free-air temperature | –40 | 125 | °C |
6.4 Thermal Information
| THERMAL METRIC(1) | TPD4E02B04 | UNIT | |
|---|---|---|---|
| DQA (USON) | |||
| 10 PINS | |||
| RθJA | Junction-to-ambient thermal resistance | 348.7 | °C/W |
| RθJC(top) | Junction-to-case (top) thermal resistance | 214.1 | °C/W |
| RθJB | Junction-to-board thermal resistance | 270.7 | °C/W |
| ψJT | Junction-to-top characterization parameter | 81.7 | °C/W |
| ψJB | Junction-to-board characterization parameter | 270.7 | °C/W |
| RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | °C/W |
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
6.5 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| VRWM | Reverse stand-off voltage | IIO < 10 nA | -3.6 | 3.6 | V | |
| VBRF | Breakdown Voltage, any IO pin to GND(1) | IIO = 1 mA, TA = 25°C | 5.5 | 6.4 | 7.5 | V |
| VBRR | Breakdown Voltage, GND to any IO pin(1) | IIO = 1 mA, TA = 25°C | -5.5 | -6.4 | -7.5 | V |
| VHOLD | Holding voltage(2) | IIO = 1 mA | 5.8 | V | ||
| VCLAMP | Clamping voltage | IPP = 1 A, TLP, from IO to GND | 6.6 | V | ||
| IPP = 5 A, TLP, from IO to GND | 8.8 | |||||
| IPP = 1 A, TLP, from GND to IO | 6.6 | |||||
| IPP = 5A, TLP, from GND to IO | 8.8 | |||||
| ILEAK | Leakage current, any IO to GND | VIO = ±2.5 V | 10 | nA | ||
| RDYN | Dynamic Resistance | IO to GND | 0.47 | Ω | ||
| GND to IO | 0.47 | |||||
| CL | Line Capacitance | VIO = 0 V, f = 1 MHz, IO to GND, TA = 25°C | 0.27 | 0.37 | pF | |
| ΔCL | Variation of Line Capacitance | Delta of capacitance between any two IO pins, VIO = 0 V, f = 1 MHz, TA = 25°C, GND = 0 V | 0.01 | 0.07 | pF | |
| CCROSS | Channel to Channel Capacitance | Capacitance from one IO to another, VIO = 0 V, f = 1 MHz, GND = 0 V | 0.13 | pF | ||
(1) VBRF and VBRR are defined as the voltage when 1mA is applied in the positive-going direction, before the device latches into the snapback state
(2) VHOLD is defined as the voltage when 1mA is applied in the negative-going direction, after the device has successfully latched into the snapback state
6.6 Typical Characteristics
A.
Figure 1. Positive TLP Curve
Figure 3. Surge Curve (tp = 8/20µs), any IO pin to GND
Figure 5. –8-kV IEC Waveform
Figure 7. Capacitance vs. Ambient Temperature
Figure 9. DC Voltage Sweep I-V Curve
Figure 11. 8-kV IEC Waveform through 2m HDMI Cable
Figure 13. USB3.0 Eye Diagram (Bare Board)
Figure 15. USB3.1 Gen 2 Eye Diagram (Bare Board)
Figure 17. HDMI2.0 6Gbps TP2 Eye Diagram (Bare Board)
Figure 19. Differential Insertion Loss
A.
Figure 2. Negative TLP Curve
Figure 4. 8-kV IEC Waveform
Figure 6. Capacitance vs. Bias Voltage
Figure 8. Leakage Current vs. Temperature
Figure 10. Capacitance vs. Frequency
Figure 12. –8-kV IEC Waveform through 2m HDMI Cable
Figure 14. USB3.0 Eye Diagram (with TPD4E02B04)
Figure 16. USB3.1 Gen 2 Eye Diagram (with TPD4E02B04)
Figure 18. HDMI2.0 6Gbps TP2 Eye Diagram (with TPD4E02B04)