Table 1. Temperature Data Format (Local and Remote Temperature)

7.5.1.1 Bus Overview

The TMP468 device is compatible with the I²C or SMBus interface. In I²C or SMBus protocol, the device that initiates the transfer is called a master, and the devices controlled by the master are slaves. The bus must be controlled by a master device that generates the serial clock (SCL), controls the bus access, and generates the start and stop conditions.

To address a specific device, a start condition is initiated. A start condition is indicated by pulling the data line (SDA) from a high-to-low logic level when SCL is high. All slaves on the bus shift in the slave address byte, with the last bit indicating whether a read or write operation is intended. During the ninth clock pulse, the addressed slave responds to the master by generating an acknowledge (ACK) bit and pulling SDA low.

Data transfer is then initiated and sent over eight clock pulses followed by an acknowledge bit (ACK). During data transfer, SDA must remain stable when SCL is high. A change in SDA when SCL is high is interpreted as a control signal. The TMP468 device has a word register structure (16-bit wide), with data writes always requiring two bytes. Data transfer occurs during the ACK at the end of the second byte.

After all data are transferred, the master generates a stop condition. A stop condition is indicated by pulling SDA from low to high when SCL is high.

7.5.1.2 Bus Definitions

The TMP468 device has a two-wire interface that is compatible with the I²C or SMBus interface. Figure 15 through Figure 20 illustrate the timing for various operations on the TMP468 device. The bus definitions are as follows:

Figure 15. Two-Wire Timing Diagram for Write Pointer Byte

Figure 16. Two-Wire Timing Diagram for Write Pointer Byte and Value Word

1. The master must leave SDA high to terminate a single-byte read operation.

Figure 17. Two-Wire Timing Diagram for Pointer Set Followed by a Repeat Start and Single-Byte Read Format

Figure 18. Two-Wire Timing Diagram for Pointer Byte Set Followed by a Repeat Start and Word (Two-Byte) Read

Figure 19. Two-Wire Timing Diagram for Pointer Byte Set Followed by a Repeat Start and Multiple-Word (N-Word) Read

Figure 20. Two-Wire Timing Diagram for Multiple-Word (N-Word) Read Without a Pointer Byte Set

7.5.1.3 Serial Bus Address

To communicate with the TMP468 device, the master must first address slave devices using a slave address byte. The slave address byte consists of seven address bits and a direction bit indicating the intent of executing a read or write operation. The TMP468 device allows up to four devices to be addressed on a single bus. The assigned device address depends on the ADD pin connection as described in Table 2.

7.5.1.4 Read and Write Operations

Accessing a particular register on the TMP468 device is accomplished by writing the appropriate value to the pointer register. The value for the pointer register is the first byte transferred after the slave address byte with the R/W bit low. Every write operation to the TMP468 device requires a value for the pointer register (see Figure 16).

The TMP468 registers can be accessed with block or single register reads. Block reads are only supported for pointer values 80h to 88h. Registers at 80h through 88h mirror the Remote and Local Temperature registers (00h to 08h). Pointer values 00h to 08h are for single register reads.

7.5.1.5 Timeout Function

The TMP468 device resets the serial interface if either SCL or SDA are held low for 17.5 ms (typical) between a start and stop condition. If the TMP468 device is holding the bus low, the device releases the bus and waits for a start condition. To avoid activating the timeout function, maintain a communication speed of at least 1 kHz for the SCL operating frequency.

7.5.1.6 High-Speed Mode

For the two-wire bus to operate at frequencies above 1 MHz, the master device must issue a high-speed mode (HS-mode) master code (0000 1xxx) as the first byte after a start condition to switch the bus to high-speed operation. The TMP468 device does not acknowledge the master code byte, but switches the input filters on SDA and SCL and the output filter on SDA to operate in HS-mode, allowing transfers up to 2.56 MHz. After the HS-mode master code is issued, the master transmits a two-wire slave address to initiate a data transfer operation. The bus continues to operate in HS-mode until a stop condition occurs on the bus. Upon receiving the stop condition, the TMP468 device switches the input and output filters back to fast mode.

7.6.1.1 Pointer Register

shows the internal register structure of the TMP468 device. The 8-bit pointer register addresses a given data register. The pointer register identifies which of the data registers must respond to a read or write command on the two-wire bus. This register is set with every write command. A write command must be issued to set the proper value in the pointer register before executing a read command. Table 3 describes the pointer register and the internal structure of the TMP468 registers. The power-on-reset (POR) value of the pointer register is 00h (0000 0000b). Table 3 lists a summary of the pointer values for the different registers. Writing data to unassigned pointer values are ignored and does not affect the operation of the device. Reading an unassigned register returns undefined data and is ACKed.

Figure 21. TMP468 Internal Register Structure

7.6.1.2 Local and Remote Temperature Value Registers

The TMP468 device has multiple 16-bit registers that hold 13-bit temperature measurement results. The 13 bits of the local temperature sensor result are stored in register 00h. The 13 bits of the eight remote temperature sensor results are stored in registers 01h through 08h. The four assigned LSBs of both the local (LT3:LT0) and remote (RT3:RT0) sensors indicate the temperature value after the decimal point (for example, if the temperature result is 10.0625°C, then the high byte is 0000 0101 and the low byte is 0000 1000). These registers are read-only and are updated by the ADC each time a temperature measurement is complete. Asynchronous reads are supported, so a read operation can occur at any time and results in valid conversion results being transmitted once the first conversion is complete after power up for the channel being accessed. If after power up a read is initiated before a conversion is complete, the read operation results in all zeros (0x0000).

7.6.1.3 Software Reset Register

The Software Reset Register allows the user to reset the TMP468 registers through software by setting the reset bit (RST, bit 15) to 1. The power-on-reset value for this register is 0x0000. Resets are ignored when the device is in lock mode, so writing a 1 to the RST bit does not reset any registers.

7.6.1.4 THERM Status Register

The THERM Status register reports the state of the THERM limit comparators for local and eight remote temperatures. Table 5 lists the status register bits. The THERM Status register is read-only and is read by accessing pointer address 21h.

The R8TH:R1TH and LTH flags are set when the corresponding temperature exceeds the respective programmed THERM limit (39h, 42h, 4Ah, 52h, 5Ah, 62h, 6Ah, 72h, 7Ah). These flags are reset automatically when the temperature returns below the THERM limit minus the value set in the THERM Hysteresis register (38h). The THERM output goes low in the case of overtemperature on either the local or remote channels, and goes high as soon as the measurements are less than the THERM limit minus the value set in the THERM Hysteresis register. The THERM Hysteresis register (38h) allows hysteresis to be added so that the flag resets and the output goes high when the temperature returns to or goes below the limit value minus the hysteresis value.

7.6.1.5 THERM2 Status Register

The THERM2 Status register reports the state of the THERM2 limit comparators for local and remote 1-8 temperatures. Table 6 lists the status register bits. The THERM2 Status register is read-only and is read by accessing pointer address 22h.

The R8TH2:R1TH2 and LTH2 flags are set when the corresponding temperature exceeds the respective programmed THERM2 limit (3Ah, 43h, 4Bh, 53h, 5Bh, 63h, 6Bh, 73h, 7Bh). These flags are reset automatically when the temperature returns below the THERM2 limit minus the value set in the THERM Hysteresis register (38h). The THERM2 output goes low in the case of overtemperature on either the local or remote channels, and goes high as soon as the measurements are less than the THERM2 limit minus the value set in the THERM Hysteresis register. The THERM Hysteresis register (38h) allows hysteresis to be added so that the flag resets and the output goes high when the temperature returns to or goes below the limit value minus the hysteresis value.

7.6.1.6 Remote Channel Open Status Register

The Remote Channel Open Status register reports the state of the connection of remote channels one through eight. Table 7 lists the status register bits. The Remote Channel Open Status register is read-only and is read by accessing pointer address 23h.

The R8OPEN:R1OPEN bits indicate an open-circuit condition on remote sensors eight through one, respectively. The setting of these flags does not directly affect the state of the THERM or THERM2 output pins. Indirectly, the temperature reading(s) may be erroneous and exceed the respective THERM and THERM2 limits, activating the THERM or THERM2 output pins.

7.6.1.7 Configuration Register

The Configuration Register sets the conversion rate, starts one-shot conversion of all enabled channels, enables conversion the temperature channels, controls the shutdown mode and reports when a conversion is in process. The Configuration Register is set by writing to pointer address 30h, and is read from pointer address 30h. Table 8 summarizes the bits of the Configuration Register.

The Remote Enable eight through one (REN8:REN1, bits 15:8) bits enable conversions on the respective remote channels. The Local Enable (LEN, bit 7) bit enables conversions of the local temperature channel. If all LEN and REN are set to 1 (default), this enables the ADC to convert the local and all remote temperatures. If the LEN is set to 0, the local temperature conversion is skipped. Similarly if a REN is set to 0, that remote temperature conversion channel is skipped. The TMP468 device steps through each enabled channel in a round-robin fashion in the following order: LOC, REM1, REM2, REM8, LOC, REM1, and so on. All local and remote temperatures are converted by the internal ADC by default after power up. The configuration register LEN and REN bits can be configured to save power by reducing the total ADC conversion time for applications that do not require all of the eight remote and local temperature information. Note writing all zeros to REN8:REN1 and LEN has the same effect as SD = 1 and OS = 0.

The shutdown bit (SD, bit 5) enables or disables the temperature-measurement circuitry. If SD = 0 (default), the TMP468 device converts continuously at the rate set in the conversion rate register. When SD is set to 1, the TMP468 device immediately stops the conversion in progress and instantly enters shutdown mode. When SD is set to 0 again, the TMP468 device resumes continuous conversions starting with the local temperature.

The BUSY bit = 1 if the ADC is making a conversion. This bit is set to 0 if the ADC is not converting.

After the TMP468 device is in shutdown mode, writing a 1 to the one-shot (OS, bit 6) bit starts a single ADC conversion of all the enabled temperature channels. This write operation starts one conversion and comparison cycle on either the eight remote and one local sensor or any combination of sensors, depending on the LEN and REN values in the Configuration Register (read address 30h). The TMP468 device returns to shutdown mode when the cycle is complete. Table 9 details the interaction of the SD, OS, LEN, and REN bits.

The conversion rate bits control the rate that the conversions occur (CR2:CR0, bits 4:2). The value of CR2:CR0 bits controls the idle time between conversions but not the conversion time itself, which allows the TMP468 device power dissipation to be balanced with the update rate of the temperature register. Table 10 describes the mapping for CR2:CR0 to the conversion rate or temperature register update rate.

The remaining bits of the configuration register are reserved and must always be set to 0. The POR value for this register is 0x0F9C.

7.6.1.8 η-Factor Correction Register

The TMP468 device allows for a different η-factor value to be used for converting remote channel measurements to temperature for each temperature channel. There are eight η-Factor Correction registers assigned: one to each of the remote input channels (addresses 41h, 49h, 51h, 59h, 61h, 69h, 71h and 79h). Each remote channel uses sequential current excitation to extract a differential V_BE voltage measurement to determine the temperature of the remote transistor. Equation 1 shows this voltage and temperature.

Equation 1.

The value η in Equation 1 is a characteristic of the particular transistor used for the remote channel. The POR value for the TMP468 device is η = 1.008. The value in the η-Factor Correction register can be used to adjust the effective η-factor, according to Equation 2 and Equation 3.

Equation 2.

Equation 3.

The η-factor correction value must be stored in a two's-complement format, which yields an effective data range from –128 to +127. The POR value for each register is 0000h, which does not affect register values unless a different value is written to the register. The resolution of the η-factor register changes linearly as the code changes and has a range from 0.0004292 to 0.0005476, with an average of 0.0004848.

7.6.1.9 Remote Temperature Offset Register

The offset registers allow the TMP468 device to store any system offset compensation value that may result from precision calibration. The value in these registers is added to the remote temperature results upon every conversion. Each of the eight temperature channels have an independent assigned offset register (addresses 40h, 48h, 50h, 58h, 60h, 68h, 70h, and 78h). Combined with the independent η-factor corrections, this function allows for very accurate system calibration over the entire temperature range for each remote channel. The format of these registers is the same as the temperature value registers with a range from +127.9375 to –128. Take care to program this register with sign extension, as values above +127.9375 and below –128 are not supported.

7.6.1.10 THERM Hysteresis Register

The THERM Hysteresis register (address 38h) sets the value of the hysteresis used by the temperature comparison logic. All temperature reading comparisons have a common hysteresis. Hysteresis prevents oscillations from occurring on the THERM and THERM2 outputs as the measured temperature approaches the comparator threshold (see the THERM Functions section). The resolution of the THERM Hysteresis register is 1°C and ranges from 0°C to 255°C.

7.6.1.11 Local and Remote THERM and THERM2 Limit Registers

Each of the eight remote and the local temperature channels has associated independent THERM and THERM2 Limit registers. There are nine THERM registers (addresses 39h, 42h, 4Ah, 52h, 5Ah, 62h, 6Ah, 72h, and 7Ah) and nine THERM2 registers (addresses 39h, 43h, 4Bh, 53h, 5Bh, 63h, 6Bh, 73h, and 7Bh), 18 registers in total. The resolution of these registers is 0.5°C and ranges from +255.5°C to –255°C. See the THERM Functions section for more information.

Setting a THERM limit to 255.5°C disables the THERM limit comparison for that particular channel and disables the limit flag from being set in the THERM Status register. This prevents the associated channel from activating the THERM output. THERM2 limits, status, and outputs function similarly.

7.6.1.12 Block Read - Auto Increment Pointer

Block reads can be initiated by setting the pointer register to 80h to 87h. The temperature results are mirrored at pointer addresses 80h to 88h; temperature results for all the channels can be read with one read transaction. Setting the pointer register to any address from 80h to 88h signals to the TMP468 device that a block of more than two bytes must be transmitted before a design stop is issued. In block read mode, the TMP468 device auto increments the pointer address. After 88h, the pointer resets to 80h. The master must NACK the last byte read so the TMP468 device can discontinue driving the bus, which allows the master to initiate a stop. In this mode, the pointer continuously loops in the address range from 80h to 88h, so the register may be easily read multiple times. Block read does not disrupt the conversion process.

7.6.1.13 Lock Register

Register C4h allows the device configuration and limit registers to lock, as shown by the Lock column in Table 3. To lock the registers, write 0x5CA6. To unlock the registers, write 0xEB19. When the lock function is enabled, reading the register yields 0x8000; when unlocked, 0x0000 is transmitted.

7.6.1.14 Manufacturer and Device Identification Plus Revision Registers

The TMP468 device allows the two-wire bus controller to query the device for manufacturer and device identifications (IDs) to enable software identification of the device at the particular two-wire bus address. The manufacturer ID is obtained by reading from pointer address FEh; the device ID is obtained from register FFh. Note that the most significant byte of the Device ID register identifies the TMP468 device revision level. The TMP468 device reads 0x5449 for the manufacturer code and 0x0468 for the device ID code for the first release.