ZHCSHO9Q July 2006 – August 2024 TLK2711-SP
PRODUCTION DATA
All true serial interfaces require a method of encoding to ensure minimum transition density, so that the receiving phase-locked loop (PLL) has a minimal number of transitions to stay locked on. The encoding scheme maintains the signal DC balance by keeping the number of 1s and 0s the same. This provides good transition density for clock recovery and improves error checking. The TLK2711-SP uses the 8-bit/10-bit encoding algorithm that is used by fibre channel and gigabit ethernet. This is transparent to the user, as the TLK2711-SP internally encodes and decodes the data such that the user reads and writes actual 16-bit data.
The 8-bit/10-bit encoder converts 8-bit-wide data to a 10-bit-wide encoded data character to improve its transmission characteristics. Because the TLK2711-SP is a 16-bit-wide interface, the data is split into two 8-bit-wide bytes for encoding. Each byte is fed into a separate encoder. The encoding is dependent upon two additional input signals, TKMSB and TKLSB.
| TKLSB | TKMSB | 16-BIT PARALLEL INPUT | |
|---|---|---|---|
| 0 | 0 | Valid data on TXD0 to TXD7 | Valid data TXD8 to TXD15 |
| 0 | 1 | Valid data on TXD0 to TXD7 | K code on TXD8 to TXD15 |
| 1 | 0 | K code on TXD0 to TXD7 | Valid data on TXD8 to TXD15 |
| 1 | 1 | K code on TXD0 to TXD7 | K code on TXD8 to TXD15 |