ZHCSH92D December 2017 – June 2022 TLIN2022-Q1
PRODUCTION DATA
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 LIN (Local Interconnect Network) Bus
- 7.3.2 TXD (Transmit Input and Output)
- 7.3.3 RXD (Receive Output)
- 7.3.4 VSUP (Supply Voltage)
- 7.3.5 GND (Ground)
- 7.3.6 EN (Enable Input)
- 7.3.7 Protection Features
- 7.3.8 TXD Dominant Time Out (DTO)
- 7.3.9 Bus Stuck Dominant System Fault: False Wake Up Lockout
- 7.3.10 Thermal Shutdown
- 7.3.11 Under Voltage on VSUP
- 7.3.12 Unpowered Device and LIN Bus
- 7.4 Device Functional Modes
- 8 Application and Implementation
- 9 Device and Documentation Support
- 10Mechanical, Packaging, and Orderable Information
封裝選項
機械數據 (封裝 | 引腳)
散熱焊盤機械數據 (封裝 | 引腳)
- DMT|14
訂購信息
8.2.3 Application Curves
Figure 8-2 and Figure 8-3 show the propagation delay from the TXD pin to the LIN pin for both dominant to recessive and recessive to dominant stated under lightly loaded conditions.
Figure 8-2 Dominant to Recessive Propagation
Figure 8-3 Recessive to Dominant Propagation