ZHCSJJ3E July 2009 – April 2019 TCA9555
PRODUCTION DATA.
| PIN | TYPE | DESCRIPTION | ||
|---|---|---|---|---|
| NAME | NO. | |||
| DB, PW | RTW, RGE | |||
| A0 | 21 | 18 | Input | Address input 0. Connect directly to VCC or ground |
| A1 | 2 | 23 | Input | Address input 1. Connect directly to VCC or ground |
| A2 | 3 | 24 | Input | Address input 2. Connect directly to VCC or ground |
| GND | 12 | 9 | GND | Ground |
| INT | 1 | 22 | Output | Interrupt output. Connect to VCC through a pull-up resistor |
| P00 | 4 | 1 | I/O | P-port I/O. Push-pull design structure. At power on, P00 is configured as an input |
| P01 | 5 | 2 | I/O | P-port I/O. Push-pull design structure. At power on, P01 is configured as an input |
| P02 | 6 | 3 | I/O | P-port I/O. Push-pull design structure. At power on, P02 is configured as an input |
| P03 | 7 | 4 | I/O | P-port I/O. Push-pull design structure. At power on, P03 is configured as an input |
| P04 | 8 | 5 | I/O | P-port I/O. Push-pull design structure. At power on, P04 is configured as an input |
| P05 | 9 | 6 | I/O | P-port I/O. Push-pull design structure. At power on, P05 is configured as an input |
| P06 | 10 | 7 | I/O | P-port I/O. Push-pull design structure. At power on, P06 is configured as an input |
| P07 | 11 | 8 | I/O | P-port I/O. Push-pull design structure. At power on, P07 is configured as an input |
| P10 | 13 | 10 | I/O | P-port I/O. Push-pull design structure. At power on, P10 is configured as an input |
| P11 | 14 | 11 | I/O | P-port I/O. Push-pull design structure. At power on, P11 is configured as an input |
| P12 | 15 | 12 | I/O | P-port I/O. Push-pull design structure. At power on, P12 is configured as an input |
| P13 | 16 | 13 | I/O | P-port I/O. Push-pull design structure. At power on, P13 is configured as an input |
| P14 | 17 | 14 | I/O | P-port I/O. Push-pull design structure. At power on, P14 is configured as an input |
| P15 | 18 | 15 | I/O | P-port I/O. Push-pull design structure. At power on, P15 is configured as an input |
| P16 | 19 | 16 | I/O | P-port I/O. Push-pull design structure. At power on, P16 is configured as an input |
| P17 | 20 | 17 | I/O | P-port I/O. Push-pull design structure. At power on, P17 is configured as an input |
| SCL | 22 | 19 | Input | Serial clock bus. Connect to VCC through a pull-up resistor |
| SDA | 23 | 20 | Input | Serial data bus. Connect to VCC through a pull-up resistor |
| VCC | 24 | 21 | Supply | Supply voltage |