ZHCSMI4 november 2020 TAS6424MS-Q1
PRODUCTION DATA
- 1
- 1 特性
- 2 應(yīng)用
- 3 說(shuō)明
- 4 Revision History
- 5 Device Options
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Parameter Measurement Information
-
9 Detailed Description
- 9.1 Overview
- 9.2 Functional Block Diagram
- 9.3
Feature Description
- 9.3.1 Serial Audio Port
- 9.3.2 High-Pass Filter
- 9.3.3 Volume Control and Gain
- 9.3.4 High-Frequency Pulse-Width Modulator (PWM)
- 9.3.5 Channel-to-Channel Phase Control
- 9.3.6 Gate Drive
- 9.3.7 Power FETs
- 9.3.8 Load Diagnostics
- 9.3.9
Protection and Monitoring
- 9.3.9.1 Overcurrent Limit (ILIMIT)
- 9.3.9.2 Overcurrent Shutdown (ISD)
- 9.3.9.3 DC Detect
- 9.3.9.4 Clip Detect
- 9.3.9.5 Global Overtemperature Warning (OTW), Overtemperature Shutdown (OTSD)
- 9.3.9.6 Channel Overtemperature Warning [OTW(i)] and Shutdown [OTSD(i)]
- 9.3.9.7 Undervoltage (UV) and Power-On-Reset (POR)
- 9.3.9.8 Overvoltage (OV) and Load Dump
- 9.3.10 Power Supply
- 9.3.11 Hardware Control Pins
- 9.4 Device Functional Modes
- 9.5 Programming
- 9.6
Register Maps
- 9.6.1 Mode Control Register (address = 0x00) [default = 0x00]
- 9.6.2 Miscellaneous Control 1 Register (address = 0x01) [default = 0x32]
- 9.6.3 Miscellaneous Control 2 Register (address = 0x02) [default = 0x62]
- 9.6.4 SAP Control (Serial Audio-Port Control) Register (address = 0x03) [default = 0x04]
- 9.6.5 Channel State Control Register (address = 0x04) [default = 0x55]
- 9.6.6 Channel 1 Through 4 Volume Control Registers (address = 0x05–0x08) [default = 0xCF]
- 9.6.7 DC Load Diagnostic Control 1 Register (address = 0x09) [default = 0x00]
- 9.6.8 DC Load Diagnostic Control 2 Register (address = 0x0A) [default = 0x11]
- 9.6.9 DC Load Diagnostic Control 3 Register (address = 0x0B) [default = 0x11]
- 9.6.10 DC Load Diagnostic Report 1 Register (address = 0x0C) [default = 0x00]
- 9.6.11 DC Load Diagnostic Report 2 Register (address = 0x0D) [default = 0x00]
- 9.6.12 DC Load Diagnostics Report 3 Line Output Register (address = 0x0E) [default = 0x00]
- 9.6.13 Channel State Reporting Register (address = 0x0F) [default = 0x55]
- 9.6.14 Channel Faults (Overcurrent, DC Detection) Register (address = 0x10) [default = 0x00]
- 9.6.15 Global Faults 1 Register (address = 0x11) [default = 0x00]
- 9.6.16 Global Faults 2 Register (address = 0x12) [default = 0x00]
- 9.6.17 Warnings Register (address = 0x13) [default = 0x20]
- 9.6.18 Pin Control Register (address = 0x14) [default = 0x00]
- 9.6.19 AC Load Diagnostic Control 1 Register (address = 0x15) [default = 0x00]
- 9.6.20 AC Load Diagnostic Control 2 Register (address = 0x16) [default = 0x00]
- 9.6.21 AC Load Diagnostic Impedance Report Ch1 through Ch4 Registers (address = 0x17–0x1A) [default = 0x00]
- 9.6.22 AC Load Diagnostic Phase Report High Register (address = 0x1B) [default = 0x00]
- 9.6.23 AC Load Diagnostic Phase Report Low Register (address = 0x1C) [default = 0x00]
- 9.6.24 AC Load Diagnostic STI Report High Register (address = 0x1D) [default = 0x00]
- 9.6.25 AC Load Diagnostic STI Report Low Register (address = 0x1E) [default = 0x00]
- 9.6.26 Miscellaneous Control 3 Register (address = 0x21) [default = 0x00]
- 9.6.27 Clip Control Register (address = 0x22) [default = 0x01]
- 9.6.28 Clip Window Register (address = 0x23) [default = 0x14]
- 9.6.29 Clip Warning Register (address = 0x24) [default = 0x00]
- 9.6.30 ILIMIT Status Register (address = 0x25) [default = 0x00]
- 9.6.31 Miscellaneous Control 4 Register (address = 0x26) [default = 0x40]
- 10Application Information Disclaimer
- 11Power Supply Recommendations
- 12Layout
- 13Device and Documentation Support
- 14Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- DKQ|56
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
- DKQ|56
訂購(gòu)信息
9.3.8.3.3 Impedance Phase Measurement
After performing the phase reference measurements, measure the phase of the speaker load. This is performed in the same manner as the reference measurements, except the loopback is disabled in bit 7 register 0x16. Previously, the phase reference is measured on channel 1 and channel 3. In this test stage all four channels are measured. Measure the channels sequentially as they cannot be measured at the same time.
For loopback delay detection, use the following test procedure for either BTL mode or PBTL mode:
- BTL mode
- Set the AC_DIAGS_LOOPBACK bit (bit 7 in register 0x16) to 0 to disable AC loopback mode.
- Apply a 0-dBFS 19 kHz signal and enable AC load diagnostics. CH1 and CH2 reuse the AC sensing loop of CH1 (set bit 3 in register 0x15 to 1). CH3, CH4 reuse the AC sensing loop of CH3 (set bit 1 in register 0x15 to 1).
- Read back the 16 bit hexadecimal, AC_LDG_PHASE1 value. Register 0x1B holds the MSB and register 0x1C holds the LSB.
- Read back the hexadecimal stimulus value, STI. register 0x1D holds the MSB and register 0x1E holds the LSB.
- For channel 1/2 set bit 3 in register 0x15 to 0. For channel 3/4 set bit 1 in register 0x15 to 0.
When the test is complete, the channel reporting register indicates the status change from the AC diagnostic mode to the Hi-Z state. The detected impedance is stored in the appropriate I2C register.
- PBTL mode
- Set the AC_DIAGS_LOOPBACK bit (bit 7 in register 0x16) to 0 to disable AC loopback mode.
- Set the PBTL CH12 and PBTL CH34 bits (see register 0x00) to 0 without toggling SDz pin to enter BTL mode only for load diagnostics.
- Apply a 0 dBFS 19 kHz signal and enable AC load diagnostics. For PBTL_12, enable the AC sensing loop of CH1 (set bit 3 in register 0x15 to 1). For PBTL_34, enable the AC sensing loop of CH3 (set bit 1 in register 0x15 to 1).
- Read back the AC_LDG_PHASE1 value. register 0x1B holds the MSB and register 0x1C holds the LSB.
- Read back the hexadecimal stimulus value, STI. register 0x1D holds the MSB and register 0x1E holds the LSB
- Set the PBTL CH12 and PBTL CH34 bits (see register 0x00) to 1 to go back to PBTL mode for load diagnostics.
- For PBTL_12 set bit 3 in register 0x15 to 0. For PBTL_34 set bit 1 in register 0x15 to 0.
The AC phase in degrees is calculated with the AC Phase Calculation equation:
Equation 2. 
Where:
- Phase_CHx(LBK) is the reference phase measurement. LBK stands for loopback mode
- Ph