ZHCSEH3B December 2015 – September 2018 TAS5411-Q1
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 修訂歷史記錄
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Parameter Measurement Information
-
9 Detailed Description
- 9.1 Overview
- 9.2 Functional Block Diagram
- 9.3 Feature Description
- 9.4 Device Functional Modes
- 9.5 Register Maps
- 10Application and Implementation
- 11Power Supply Recommendations
- 12Layout
- 13器件和文檔支持
- 14機械、封裝和可訂購信息
12.2.1 Top Layer
The red boxes around number 1 are the copper ground on the top layer. Soldered directly to the thermal pad, this ground is the first significant thermal dissipation needed. There are vias that go to the other layers for further thermal relief, but vias have high thermal resistance. TI recommends that use of this top layer be mostly for thermal dissipation. A further recommendation is short routes from output pins to the second-order LC filter for EMC suppression. The number 2 arrow indicates these short routes. The shorter the distance, the less EMC radiates. A short route from the PVDD pin to the LC filter from the battery or power source, as indicated by the number 3 arrow, also improves EMC suppression. The red box around number 4 indicates the ground plane that is common to both OUTP and OUTN. Place the capacitors of the LC filter in this common ground plane to help with common-mode noise and short ground loops.
Figure 18. Top Layer