| OPERATING CURRENT |
| PVDD idle current |
In PLAY mode, no audio present |
|
16 |
|
mA |
| PVDD standby current |
STANDBY mode, MUTE = 0 V |
|
5 |
20 |
μA |
| OUTPUT POWER |
| Output power per channel |
4 Ω, THD+N ≤ 1%, 1 kHz, TC = 75°C |
|
6 |
|
W |
| 4 Ω, THD+N = 10%, 1 kHz, TC = 75°C |
|
8 |
|
| Power efficiency |
4 Ω, P(O) = 8 W (10% THD) |
|
83% |
|
|
| AUDIO PERFORMANCE |
| Noise voltage at output |
G = 20 dB, zero input, and A-weighting |
|
65 |
|
μV |
| Common-mode rejection ratio |
f = 1 kHz, 100 mVrms referenced to GND, G = 20 dB |
|
63 |
|
dB |
| Power-supply rejection ratio |
PVDD = 14.4 Vdc + 1 Vrms, f = 1 kHz |
|
75 |
|
dB |
| Total harmonic distortion + noise |
P(O) = 1 W, f = 1 kHz |
|
0.05% |
|
|
| Switching frequency |
Switching frequency selectable for AM interference avoidance |
|
400 |
|
kHz |
|
500 |
|
| Internal common-mode input bias voltage |
Internal bias applied to IN_N, IN_P pins |
|
3 |
|
V |
| Voltage gain (VO / VIN) |
Source impedance = 0 Ω, register 0x03 bits 7–6 = 00 |
19 |
20 |
21 |
dB |
| Source impedance = 0 Ω, register 0x03 bits 7–6 = 01 |
25 |
26 |
27 |
| Source impedance = 0 Ω, register 0x03 bits 7–6 = 10 |
31 |
32 |
33 |
| Source impedance = 0 Ω, register 0x03 bits 7–6 = 11 |
35 |
36 |
37 |
| PWM OUTPUT STAGE |
| FET drain-to-source resistance |
TJ = 25°C |
|
180 |
|
mΩ |
| Output offset voltage |
Zero input signal, G = 20 dB |
|
|
±25 |
mV |
| PVDD OVERVOLTAGE (OV) PROTECTION |
| PVDD overvoltage-shutdown set |
|
19.5 |
21 |
22.5 |
V |
| PVDD overvoltage-shutdown hysteresis |
|
|
0.6 |
|
V |
| PVDD UNDERVOLTAGE (UV) PROTECTION |
| PVDD undervoltage-shutdown set |
|
3.6 |
4 |
4.4 |
V |
| PVDD undervoltage-shutdown hysteresis |
|
|
0.25 |
|
V |
| BYP |
| BYP pin voltage |
|
6.4 |
6.9 |
7.4 |
V |
| POWER-ON RESET (POR) |
| PVDD voltage for POR |
|
|
|
4.1 |
V |
| PVDD recovery hysteresis voltage for POR |
|
|
0.3 |
|
V |
| OVERTEMPERATURE (OT) PROTECTION |
| Junction temperature for overtemperature shutdown |
|
155 |
170 |
|
°C |
| Junction temperature overtemperature shutdown hysteresis |
|
|
15 |
|
°C |
| OVERCURRENT (OC) SHUTDOWN PROTECTION |
| Maximum current (peak output current) |
|
|
2.4 |
|
A |
| STANDBY PIN |
| STANDBY pin current |
|
|
0.1 |
0.2 |
μA |
| DC DETECT |
| DC detect threshold |
|
|
2.9 |
|
V |
| DC detect step response time |
|
|
|
700 |
ms |
| FAULT REPORT |
| FAULT pin output voltage for logic-level high (open-drain logic output) |
External 47-kΩ pullup resistor to 3.3 V |
2.4 |
|
|
V |
| FAULT pin output voltage for logic-level low (open-drain logic output) |
External 47-kΩ pullup resistor to 3.3 V |
|
|
0.5 |
V |
| LOAD DIAGNOSTICS |
| Resistance to detect a short from OUT pin(s) to PVDD or ground |
|
|
|
200 |
Ω |
| Open-circuit detection threshold |
Including speaker wires |
70 |
95 |
120 |
Ω |
| Short-circuit detection threshold |
Including speaker wires |
0.9 |
1.2 |
1.5 |
Ω |
| I2C |
| SDA pin output voltage for logic-level high |
R(PU_I2C) = 4.7-kΩ pullup, supply voltage = 3.3 V or 5 V |
2.4 |
|
|
V |
| SDA pin output voltage for logic-level low |
3-mA sink current |
|
|
0.4 |
V |
| Capacitance for SCL and SDA pins |
|
|
|
10 |
pF |
| Capacitance for SDA pin |
STANDBY mode |
|
30 |
|
pF |