ZHCSFY2B August 2015 – February 2019 TAS2555
PRODUCTION DATA.
請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
| PIN | I/O/POWER | DESCRIPTION | |
|---|---|---|---|
| NO. | NAME | ||
| A1,A2 | PGND_B | P | Power ground. Connect to high current ground plane. |
| A3 | VBAT | P | Battery power supply. Connect to 2.9 V to 5.5 V battery supply. |
| A4 | ICC_GPIO9 | I/O | Stereo serial Port Interface Clock or GPIO pin. |
| A5 | WCLK1_GPIO2 | I/O | Word Clock on ASI#1 or GPIO pin. |
| A6 | DOUT1_GPIO3 | I/O | Data Output on ASI#1 or GPIO pin. |
| B1,B2 | SW | P | Boost Converter Switch Input |
| B3 | ICC_GPIO10 | I/O | Stereo serial Port Interface Data Output or GPIO pin. |
| B4 | ICC_GPI3 | I | Stereo serial Port Interface Data Input or GPI pin |
| B5 | DIN1_GPI1 | I | Audio Data Input to ASI #1 or GPI pin. |
| B6 | BCLK1_GPIO1 | I/O | Serial Bit Clock on ASI#1 or GPIO pin. |
| C1,C2 | VBOOST | P | Boost Converter Output |
| C3 | IN_P | I | Non-inverting analog input. Ground pin if not used. |
| C4 | DGND | P | Digital Ground Pin. |
| C5 | DIN2_GPIO8 | I/O | Audio Data Input to ASI #2 or GPIO pin. |
| C6 | DVDD | P | 1.8V Digital Power Supply for digital core logic. |
| D1 | SPK_M | O | Inverting Class D Output |
| D2 | VREG | P | Regulator Output |
| D3 | IN_M | I | Inverting analog input. Ground pin if not used |
| D4 | IOGND | P | Digital Interface Ground Pin. |
| D5 | IRQ_GPIO4 | I/O | Active-High interrupt pin or GPIO pin |
| D6 | MCLK_GPI2 | I | Master Clock Input or GPI pin. |
| E1 | PGND | P | Power ground. Connect to high current ground plane. |
| E2 | VSENSE_P | I | Non-inverting voltage sense Input |
| E3 | AGND | P | Analog ground. Connect to low noise ground plane. |
| E4 | SDA_MOSI | I/O | Multi Function Digital Pin For (SPI_SELECT= 0) : Data Pin for I2C Control bus For (SPI_SELECT= 1): SPI Data Input |
| E5 | WCLK2_GPIO6 | I/O | Word Clock on ASI#2 or GPIO pin. |
| E6 | DOUT2_GPIO7 | I/O | Data Output on ASI#2 or GPIO pin. |
| F1 | SPK_P | O | Non-inverting Class D Output |
| F2 | VSENSE_M | I | Inverting voltage sense Input |
| F3 | SCL_SSZ | I | Multi Function Digital Input For (SPI_SELECT= 0) : Clock Pin for I2C Control bus For (SPI_SELECT= 1): SPI chip selection pin |
| F4 | AVDD | P | 1.8V Analog Power Supply |
| F5 | ADR0_SCLK | I | Multi Function Digital Pin For (SPI_SELECT= 0) : Device I2C Programming Address LSB. For (SPI_SELECT= 1): SPI Serial Bit Clock |
| F6 | BCLK2_GPIO5 | I/O | Serial Bit Clock on ASI#2 or GPIO pin. |
| G1 | TEST2 | - | Float Connection - Do not route any signal or supply to or through this pin. |
| G2 | TEST1 | - | Float Connection - Do not route any signal or supply to or through this pin. |
| G3 | ADR1_MISO | I/O | Multi Function Digital Input / Output For (SPI_SELECT= 0) : Device I2C Programming Address MSB For (SPI_SELECT= 1): SPI Data Output |
| G4 | SPI_SELECT | I | Control Interface Select 0: I2C Selected 1: SPI Selected |
| G5 | RESET | I | Active Low Reset. |
| G6 | IOVDD | P | 1.8V or 3.3V Digital interface Power Supply for digital input and output levels. |