ZHCSWS8E September 2010 – October 2024 SN65HVD1780-Q1 , SN65HVD1781-Q1 , SN65HVD1782-Q1
PRODUCTION DATA
- 1
- 1 特性
- 2 應用
- 3 說明
- 4 Pin Configuration and Functions
- 5 Specifications
- 6 Parameter Measurement Information
- 7 Detailed Description
- 8 Application and Implementation
- 9 Device and Documentation Support
- 10Revision History
- 11Mechanical, Packaging, and Orderable Information
6 Parameter Measurement Information
Input generator rate is 100 kbps, 50% duty cycle, rise and fall times less than 6 ns, output impedance 50 ?.
Figure 6-1 Measurement of Driver Differential Output Voltage With Common-Mode Load
Figure 6-2 Measurement of Driver Differential and Common-Mode Output With RS-485
Load
Figure 6-3 Measurement of Driver Differential Output Rise and Fall Times and Propagation
Delays
D at 3 V to
test non-inverting output, D at 0 V to test inverting output.
Figure 6-4 Measurement of Driver Enable and Disable Times With Active High Output and
Pulldown Load
D at 0 V to
test non-inverting output, D at 3 V to test inverting output.
Figure 6-5 Measurement of Driver Enable and Disable Times With Active-Low Output and
Pullup Load
Figure 6-6 Measurement of Receiver Output Rise and Fall Times and Propagation
Delays
Figure 6-7 Measurement of Receiver Enable and Disable Times With Driver Enabled
Figure 6-8 SN65HVD1781 Measurement of Receiver Enable Times With Driver Disabled