ZHCSWS8E September   2010  – October 2024 SN65HVD1780-Q1 , SN65HVD1781-Q1 , SN65HVD1782-Q1

PRODUCTION DATA  

1.   1
2. 1 特性
3. 2 應(yīng)用
4. 3 說明
5. 4 Pin Configuration and Functions
6. 5 Specifications
   1. 5.1  Absolute Maximum Ratings
   2. 5.2  ESD Ratings—AEC
   3. 5.3  ESD Ratings—IEC
   4. 5.4  Recommended Operating Conditions
   5. 5.5  Thermal Information
   6. 5.6  Electrical Characteristics
   7. 5.7  Power Dissipation Ratings
   8. 5.8  Switching Characteristics
   9. 5.9  Package Dissipation Ratings
   10. 5.10 Typical Characteristics
7. 6 Parameter Measurement Information
8. 7 Detailed Description
   1. 7.1 Overview
   2. 7.2 Functional Block Diagram
   3. 7.3 Feature Description
      1. 7.3.1 Bus Fault Conditions
      2. 7.3.2 Receiver Failsafe
      3. 7.3.3 Hot-Plugging
   4. 7.4 Device Functional Modes
9. 8 Application and Implementation
   1. 8.1 Application Information
   2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
         1. 8.2.1.1 Data Rate and Bus Length
         2. 8.2.1.2 Bus Loading
      2. 8.2.2 Detailed Design Procedure
         1. 8.2.2.1 Stub Length
         2. 8.2.2.2 Receiver Failsafe
      3. 8.2.3 Application Curve
   3. 8.3 Power Supply Recommendations
   4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
10. 9 Device and Documentation Support
    1. 9.1 Device Support
       1. 9.1.1 第三方產(chǎn)品免責(zé)聲明
    2. 9.2 Documentation Support
       1. 9.2.1 Related Documentation
    3. 9.3 接收文檔更新通知
    4. 9.4 支持資源
    5. 9.5 Trademarks
    6. 9.6 靜電放電警告
    7. 9.7 術(shù)語表
11. 10Revision History
12. 11Mechanical, Packaging, and Orderable Information