ZHCSNM0F September 2006 – March 2021 PCA9554A
PRODUCTION DATA
- 1 特性
- 2 說明
- 3 Revision History
- 4 Description (Continued)
- 5 Pin Configuration And Functions
- 6 Specifications
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Application Information Disclaimer
- 10Power Supply Recommendations
- 11Device and Documentation Support
- 12Mechanical, Packaging, and Orderable Information
封裝選項
機械數據 (封裝 | 引腳)
散熱焊盤機械數據 (封裝 | 引腳)
訂購信息
8.1 Functional Block Diagram
Pin numbers shown are for the DB, DBQ, DGV, DW, or PW package.
All I/Os are set to inputs at reset.
Figure 8-1 Logic Diagram
At power-on reset, all registers return to default values.
Figure 8-2 Simplified Schematic Of P0 To P7