ZHCSNM0F September 2006 – March 2021 PCA9554A
PRODUCTION DATA
- 1 特性
- 2 說明
- 3 Revision History
- 4 Description (Continued)
- 5 Pin Configuration And Functions
- 6 Specifications
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Application Information Disclaimer
- 10Power Supply Recommendations
- 11Device and Documentation Support
- 12Mechanical, Packaging, and Orderable Information
封裝選項
機械數據 (封裝 | 引腳)
散熱焊盤機械數據 (封裝 | 引腳)
訂購信息
5 Pin Configuration And Functions
Table 5-1 Pin Functions
| PIN | DESCRIPTION | ||
|---|---|---|---|
| NAME | QSOP (DBQ) SOIC (DW), SSOP (DB), TSSOP (PW), AND TVSOP (DGV) |
QFN (RGT AND RGV) |
|
| A0 | 1 | 15 | Address input. Connect directly to VCC or ground. |
| A1 | 2 | 16 | Address input. Connect directly to VCC or ground. |
| A2 | 3 | 1 | Address input. Connect directly to VCC or ground. |
| P0 | 4 | 2 | P-port input/output. Push-pull design structure. |
| P1 | 5 | 3 | P-port input/output. Push-pull design structure. |
| P2 | 6 | 4 | P-port input/output. Push-pull design structure. |
| P3 | 7 | 5 | P-port input/output. Push-pull design structure. |
| GND | 8 | 6 | Ground |
| P4 | 9 | 7 | P-port input/output. Push-pull design structure. |
| P5 | 10 | 8 | P-port input/output. Push-pull design structure. |
| P6 | 11 | 9 | P-port input/output. Push-pull design structure. |
| P7 | 12 | 10 | P-port input/output. Push-pull design structure. |
| INT | 13 | 11 | Interrupt output. Connect to VCC through a pullup resistor. |
| SCL | 14 | 12 | Serial clock bus. Connect to VCC through a pullup resistor. |
| SDA | 15 | 13 | Serial data bus. Connect to VCC through a pullup resistor. |
| VCC | 16 | 14 | Supply voltage |