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ZHCSIR8F August 2009 – September 2018 MSP430F5418 , MSP430F5419 , MSP430F5435 , MSP430F5436 , MSP430F5437 , MSP430F5438

PRODUCTION DATA.

封裝選項

機械數據 (封裝 | 引腳)

PN|80
- MTQF010B

散熱焊盤機械數據 (封裝 | 引腳)

訂購信息

5.17 Crystal Oscillator, XT2

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)⁽²⁾⁽⁵⁾

PARAMETER		TEST CONDITIONS	V_CC	MIN	TYP	MAX	UNIT
I_DVCC.XT2	XT2 oscillator crystal current consumption	f_OSC = 4 MHz, XT2OFF = 0, XT2BYPASS = 0, XT2DRIVEx = 0, T_A = 25°C	3.0 V		200		µA
		f_OSC = 12 MHz, XT2OFF = 0, XT2BYPASS = 0, XT2DRIVEx = 1, T_A = 25°C			260
		f_OSC = 20 MHz, XT2OFF = 0, XT2BYPASS = 0, XT2DRIVEx = 2, T_A = 25°C			325
		f_OSC = 32 MHz, XT2OFF = 0, XT2BYPASS = 0, XT2DRIVEx = 3, T_A = 25°C			450
f_XT2,HF0	XT2 oscillator crystal frequency, mode 0	XT2DRIVEx = 0, XT2BYPASS = 0⁽⁷⁾		4		8	MHz
f_XT2,HF1	XT2 oscillator crystal frequency, mode 1	XT2DRIVEx = 1, XT2BYPASS = 0⁽⁷⁾		8		16	MHz
f_XT2,HF2	XT2 oscillator crystal frequency, mode 2	XT2DRIVEx = 2, XT2BYPASS = 0⁽⁷⁾		16		24	MHz
f_XT2,HF3	XT2 oscillator crystal frequency, mode 3	XT2DRIVEx = 3, XT2BYPASS = 0⁽⁷⁾		24		32	MHz
f_XT2,HF,SW	XT2 oscillator logic-level square-wave input frequency, bypass mode	XT2BYPASS = 1⁽⁶⁾⁽⁷⁾		1.5		32	MHz
OA_HF	Oscillation allowance for HF crystals⁽⁸⁾	XT2DRIVEx = 0, XT2BYPASS = 0, f_XT2,HF0 = 6 MHz, C_L,eff = 15 pF			450		Ω
		XT2DRIVEx = 1, XT2BYPASS = 0, f_XT2,HF1 = 12 MHz, C_L,eff = 15 pF			320
		XT2DRIVEx = 2, XT2BYPASS = 0, f_XT2,HF2 = 20 MHz, C_L,eff = 15 pF			200
		XT2DRIVEx = 3, XT2BYPASS = 0, f_XT2,HF3 = 32 MHz, C_L,eff = 15 pF			200
t_START,HF	Start-up time	f_OSC = 6 MHz, XT2BYPASS = 0, XT2DRIVEx = 0, T_A = 25°C, C_L,eff = 15 pF	3.0 V		0.5		ms
t_START,HF	Start-up time	f_OSC = 20 MHz, XT2BYPASS = 0, XT2DRIVEx = 2, T_A = 25°C, C_L,eff = 15 pF	3.0 V		0.3		ms
C_L,eff	Integrated effective load capacitance, HF mode⁽¹⁾⁽²⁾				1		pF
	Duty cycle	Measured at ACLK, f_XT2,HF2 = 20 MHz		40%	50%	60%
f_Fault,HF	Oscillator fault frequency⁽⁴⁾	XT2BYPASS = 1⁽³⁾		30		300	kHz

(1) Includes parasitic bond and package capacitance (approximately 2 pF per pin).
Because the PCB adds additional capacitance, verify the correct load by measuring the ACLK frequency. For a correct setup, the effective load capacitance should always match the specification of the used crystal.

(2) Requires external capacitors at both terminals. Values are specified by crystal manufacturers.

(3) Measured with logic-level input frequency but also applies to operation with crystals.

(4) Frequencies below the MIN specification set the fault flag. Frequencies above the MAX specification do not set the fault flag. Frequencies that are between MIN and MAX might set the flag.

(5) To improve EMI on the XT2 oscillator the following guidelines should be observed.

Keep the traces between the device and the crystal as short as possible.
Design a good ground plane around the oscillator pins.
Prevent crosstalk from other clock or data lines into oscillator pins XT2IN and XT2OUT.
Avoid running PCB traces underneath or adjacent to the XT2IN and XT2OUT pins.
Use assembly materials and processes that avoid any parasitic load on the oscillator XT2IN and XT2OUT pins.
If conformal coating is used, make sure that it does not induce capacitive or resistive leakage between the oscillator pins.

(6) When XT2BYPASS is set, the XT2 circuit is automatically powered down. Input signal is a digital square wave with parametrics defined in the Schmitt-Trigger Inputs section of this datasheet.

(7) This represents the maximum frequency that can be input to the device externally. Maximum frequency achievable on the device operation is based on the frequencies present on ACLK, MCLK, and SMCLK cannot be exceed for a given range of operation.

(8) Oscillation allowance is based on a safety factor of 5 for recommended crystals.