ZHCSPQ7A december 2022 – april 2023 MCT8315A
PRODUCTION DATA
- 1
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 Output Stage
- 7.3.2 Device Interface
- 7.3.3 Step-Down Mixed-Mode Buck Regulator
- 7.3.4 AVDD Linear Voltage Regulator
- 7.3.5 Charge Pump
- 7.3.6 Slew Rate Control
- 7.3.7 Cross Conduction (Dead Time)
- 7.3.8 Speed Control
- 7.3.9 Starting the Motor Under Different Initial Conditions
- 7.3.10 Motor Start Sequence (MSS)
- 7.3.11 Closed Loop Operation
- 7.3.12 Speed Loop
- 7.3.13 Input Power Regulation
- 7.3.14 Anti-Voltage Surge (AVS)
- 7.3.15 Output PWM Switching Frequency
- 7.3.16 Fast Start-up (< 50 ms)
- 7.3.17 Fast Deceleration
- 7.3.18 Active Demagnetization
- 7.3.19 Motor Stop Options
- 7.3.20 FG Configuration
- 7.3.21
Protections
- 7.3.21.1 VM Supply Undervoltage Lockout
- 7.3.21.2 AVDD Undervoltage Lockout (AVDD_UV)
- 7.3.21.3 BUCK Undervoltage Lockout (BUCK_UV)
- 7.3.21.4 VCP Charge Pump Undervoltage Lockout (CPUV)
- 7.3.21.5 Overvoltage Protection (OVP)
- 7.3.21.6 Overcurrent Protection (OCP)
- 7.3.21.7 Buck Overcurrent Protection
- 7.3.21.8
Cycle-by-Cycle (CBC) Current Limit (CBC_ILIMIT)
- 7.3.21.8.1 CBC_ILIMIT Automatic Recovery next PWM Cycle (CBC_ILIMIT_MODE = 000xb)
- 7.3.21.8.2 CBC_ILIMIT Automatic Recovery Threshold Based (CBC_ILIMIT_MODE = 001xb)
- 7.3.21.8.3 CBC_ILIMIT Automatic Recovery after 'n' PWM Cycles (CBC_ILIMIT_MODE = 010xb)
- 7.3.21.8.4 CBC_ILIMIT Report Only (CBC_ILIMIT_MODE = 0110b)
- 7.3.21.8.5 CBC_ILIMIT Disabled (CBC_ILIMIT_MODE = 0111b or 1xxxb)
- 7.3.21.9 Lock Detection Current Limit (LOCK_ILIMIT)
- 7.3.21.10 Thermal Warning (OTW)
- 7.3.21.11 Thermal Shutdown (TSD)
- 7.3.21.12 Motor Lock (MTR_LCK)
- 7.3.21.13 Motor Lock Detection
- 7.3.21.14 SW VM Undervoltage Protection
- 7.3.21.15 SW VM Overvoltage Protection
- 7.3.21.16 IPD Faults
- 7.4 Device Functional Modes
- 7.5 External Interface
- 7.6 EEPROM access and I2C interface
- 7.7 EEPROM (Non-Volatile) Register Map
- 7.8 RAM (Volatile) Register Map
- 8 Application and Implementation
- 9 Power Supply Recommendations
- 10Layout
- 11Device and Documentation Support
- 12Mechanical, Packaging, and Orderable Information
7.3.13 Input Power Regulation
MCT8315A provides an option of regulating the (input) power instead of motor speed - this input power regulation can be done in two modes, namely, closed loop power control and power limit control. Input power regulation (instead of motor speed) mode is selected by setting CLOSED_LOOP_MODE to 10b. This should be accompanied by setting CONST_POWER_MODE to 01b for closed loop power control or to 10b for power limit control. In either of the power regulation modes, the maximum power that MCT8315A can draw from the DC input supply is set by MAX_POWER - the power reference (POWER_REF in Figure 7-35) varies as function of the duty command input (DUTY CMD) and MAX_POWER as given by Equation 6. The hysteresis band for the power reference is set by CONST_POWER_LIMIT_HYST. In both the power regulation modes, the minimum power reference is set by MIN_DUTY x MAX_POWER.
In both the power regulation modes, MCT8315A uses the same PI controller parameters as in the speed loop mode. Kp and Ki coefficients are configured through SPD_POWER_KP and SPD_POWER_KI. The PI controller output upper (VMAX) and lower bound (VMIN) saturation limits are configured through SPD_POWER_V_MAX and SPD_POWER_V_MIN respectively. The key difference between closed loop power control and power limit control is in when the PI controller decides the DUTY OUT (see Figure 7-13) applied to FETs. In closed loop power control, DUTY OUT is always equal to POWER_PI_OUT from the PI controller output in Figure 7-35. However, in power limit control, the PI controller decides the DUTY OUT only if POWER_MEAS > POWER_REF + CONST_POWER_LIMIT_HYST. If POWER_MEAS < POWER_REF + CONST_POWER_LIMIT_HYST, the PI controller is not used and DUTY OUT is equal to DUTY CMD. Essentially, in closed loop power control, input power is always actively regulated to POWER_REF whereas, in power limit control, input power is only limited to POWER_REF and not actively regulated to POWER_REF. When output of the power PI loop saturates, the integrator is disabled to prevent integral wind-up.
Figure 7-35 Power Regulation