Motor Control Signals

• SPEED/WAKE pin is used to control the motor speed and to wake up MCF8316C-Q1 from sleep. SPEED pin can be configured to accept PWM, frequency or analog input signals. It is also used to enter and exit from sleep and standby mode (see Table 7-7).

• When BRAKE pin is driven 'High', MCF8316C-Q1 enters brake state. Brake state can be configured to either low side brake (see Low-Side Braking) or align brake (see Align Braking) through BRAKE_PIN_MODE.MCF8316C-Q1 decreases output speed to value defined by BRAKE_SPEED_THRESHOLD before entering brake state. As long as BRAKE is driven 'High', MCF8316C-Q1 stays in brake state. Brake pin input can be overwritten by configuring BRAKE_INPUT over the I²C interface.

• The DIR pin decides the direction of motor spin; when driven 'High', the sequence is OUT A → OUT B → OUT C, and when driven 'Low', the sequence is OUT A → OUT C → OUT B. DIR pin input can be overwritten by configuring DIR_INPUT over the I²C interface.
• When DRVOFF pin is driven 'High', MCF8316C-Q1 stops driving the motor by turning OFF (Hi-Z) all MOSFETs (coast state) - this could be accompanied by faults like no motor or abnormal BEMF. When DRVOFF is driven 'Low', MCF8316C-Q1 returns to normal state of operation, as if it was restarting the motor (see DRVOFF Functionality). DRVOFF does not cause the device to go to sleep or standby mode; the digital core is still active. Entry and exit from sleep or standby condition is controlled by SPEED pin.

External Oscillator and Watchdog Signals

• EXT_CLK pin can be used to provide an external clock reference (see External Clock Source).
• EXT_WD pin can be used to provide an external watchdog signal (see External Watchdog).

Output Signals

• DACOUT1 outputs internal variable defined by address in register DACOUT1_VAR_ADDR. DACOUT1 is refreshed every PWM cycle (see DAC outputs).
• DACOUT2 outputs internal variable defined by address in register DACOUT2_VAR_ADDR. DACOUT2 is refreshed every PWM cycle (see DAC outputs).
• FG pin provides pulses which are proportional to motor speed (see FG Configuration).
• nFAULT (active low) pin provides fault status in device or motor operation.
• ALARM pin, when enabled using ALARM_PIN_EN, provides fault status in device or motor operation as an active high signal. When ALARM pin is enabled, report only faults are reported only on ALARM pin (as logic high) and not reported on nFAULT pin (as logic low). When ALARM pin is enabled, actionable faults are reported on ALARM pin (as logic high) as well as on nFAULT pin (as logic low). When ALARM pin is disabled, it is in Hi-Z state and all faults (actionable and report only) are reported on nFAULT as logic low. ALARM pin should be left floating when unused/disabled.
• SOX pin provides the output of one of the current sense amplifiers.