ZHCSHY8 March 2018 LP87561-Q1 , LP87562-Q1 , LP87563-Q1 , LP87564-Q1 , LP87565-Q1
PRODUCTION DATA.
Address: 0x1B
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
| Reserved | RESET_REG | ||||||
| Bits | Field | Type | Default | Description |
|---|---|---|---|---|
| 7:1 | Reserved | R/W | 0h | |
| 0 | RESET_REG | R/W1C | 0h | Latched status bit indicating that either start-up (NRST rising edge) is done, VANA supply voltage is less than the undervoltage threshold level, or the host has requested a reset (the SW_RESET bit in the RESET register). The regulators are disabled, the registers are reset to default values, and the normal start-up procedure is done.
Write this bit to 1h to clear the interrupt. |