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SNVS521K December 2007 – August 2014 LP2998 , LP2998-Q1

PRODUCTION DATA.

封裝選項

機械數據 (封裝 | 引腳)

DDA|8
- MPDS092F

散熱焊盤機械數據 (封裝 | 引腳)

DDA|8
- PPTD058J

訂購信息

7 Specifications

7.1 Absolute Maximum Ratings ⁽¹⁾⁽²⁾

over operating free-air temperature range (unless otherwise noted)

	MIN	MAX	UNIT
AVIN to GND	−0.3	6	V
PVIN to GND	–0.3	AVIN	V
VDDQ⁽³⁾	−0.3	6	V
Junction temperature		150	°C
Lead temperature (soldering, 10 sec)		260	°C

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.

(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications.

(3) VDDQ voltage must be less than 2 x (AVIN - 1) or 6V, whichever is smaller.

7.2 Handling Ratings: LP2998

			MIN	MAX	UNIT
T_stg	Storage temperature range		−65	150	°C
V_(ESD)	Electrostatic discharge	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins⁽¹⁾	−1000	1000	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

7.3 Handling Ratings: LP2998-Q1

				MIN	MAX	UNIT
T_stg	Storage temperature range			−65	150	°C
V_(ESD)	Electrostatic discharge	Human body model (HBM), per AEC Q100-002⁽¹⁾		−1000	1000	V

(1) AEC Q100-002 indicates HBM stressing is done in accordance with the ANSI/ESDA/JEDEC JS-001 specification. The LP2998-Q1 is rated at AEC-Q100 ESD HBM Classification Level H1C.

7.4 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

	MIN	MAX	UNIT
Junction temperature⁽¹⁾	–40	125	°C
AVIN to GND	2.2	5.5	V
PVIN supply voltage	0	AVIN	V
SD input voltage	0	AVIN	V

7.5 Thermal Information

THERMAL METRIC⁽¹⁾		LP2998/LP2998-Q1	LP2998	UNIT
		SO PowerPAD	SOIC
		8 PINS	8 PINS
R_θJA	Junction-to-ambient thermal resistance	43	151	°C/W

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

7.6 Electrical Characteristics

Typical limits tested at T_J = 25°C. Minimum and maximum limits apply over the full operating junction temperature range (T_J = –40°C to 125°C).⁽²⁾ Unless otherwise specified, AVIN = PVIN = 2.5 V, VDDQ = 2.5 V.⁽³⁾

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
V_REF	V_REF voltage (DDR I)	VIN = VDDQ = 2.3 V	1.135	1.158	1.185	V
		VIN = VDDQ = 2.5 V	1.235	1.258	1.285
		VIN = VDDQ = 2.7 V	1.335	1.358	1.385
	V_REF voltage (DDR II)	PVIN = VDDQ = 1.7 V	0.837	0.860	0.887
		PVIN = VDDQ = 1.8 V	0.887	0.910	0.937
		PVIN = VDDQ = 1.9 V	0.936	0.959	0.986
	V_REF Voltage (DDR III)	PVIN = VDDQ = 1.35V	0.669	0.684	0.699
		PVIN = VDDQ = 1.5V	0.743	0.758	0.773
		PVIN = VDDQ = 1.6V	0.793	0.808	0.823
Z_VREF	V_REF Output Impedance	I_REF = –30 to 30 µA		2.5		kΩ
V_TT	V_TT Output Voltage (DDR I) ⁽⁶⁾	I_OUT = 0 A				V
		VIN = VDDQ = 2.3 V	1.120	1.159	1.190
		VIN = VDDQ = 2.5 V	1.210	1.259	1.290
		VIN = VDDQ = 2.7 V	1.320	1.359	1.390
		I_OUT = ±1.5 A
		VIN = VDDQ = 2.3 V	1.125	1.159	1.190
		VIN = VDDQ = 2.5 V	1.225	1.259	1.290
		VIN = VDDQ = 2.7 V	1.325	1.359	1.390
	V_TT Output Voltage (DDR II) ⁽⁶⁾	I_OUT = 0 A, AVIN = 2.5 V				V
		PVIN = VDDQ = 1.7 V	0.822	0.856	0.887
		PVIN = VDDQ = 1.8 V	0.874	0.908	0.939
		PVIN = VDDQ = 1.9 V	0.923	0.957	0.988
		I_OUT = ±0.5A, AVIN = 2.5 V
		PVIN = VDDQ = 1.7 V	0.820	0.856	0.890
		PVIN = VDDQ = 1.8 V	0.870	0.908	0.940
		PVIN = VDDQ = 1.9 V	0.920	0.957	0.990
	V_TT Output Voltage (DDR III) ⁽⁶⁾	I_OUT = 0A, AVIN = 2.5 V				V
		PVIN = VDDQ = 1.35V	0.656	0.677	0.698
		PVIN = VDDQ = 1.5 V	0.731	0.752	0.773
		PVIN = VDDQ = 1.6 V	0.781	0.802	0.823
		I_OUT = 0.2 A, AVIN = 2.5V PVIN = VDDQ = 1.35V	0.667	0.688	0.710
		I_OUT = -0.2A, AVIN = 2.5V PVIN = VDDQ = 1.35V	0.641	0.673	0.694
		I_OUT = 0.4 A, AVIN = 2.5 V PVIN = VDDQ = 1.5 V	0.740	0.763	0.786
		I_OUT = –0.4 A, AVIN = 2.5 V PVIN = VDDQ = 1.5 V	0.731	0.752	0.773
		I_OUT = 0.5 A, AVIN = 2.5 V PVIN = VDDQ = 1.6 V	0.790	0.813	0.836
		I_OUT = –0.5 A, AVIN = 2.5 V PVIN = VDDQ = 1.6 V	0.781	0.802	0.823
VOS_Vtt	V_TT Output Voltage Offset (V_REF – V_TT) for DDR I ⁽⁶⁾	I_OUT = 0 A	–30	0	30	mV
		I_OUT = –1.5 A	–30	0	30
		I_OUT = 1.5 A	–30	0	30
	V_TT Output Voltage Offset (V_REF – V_TT) for DDR II ⁽⁶⁾	I_OUT = 0 A	–30	0	30
		I_OUT = –0.5 A	–30	0	30
		I_OUT = 0.5 A	–30	0	30
	V_TT Output Voltage Offset (V_REF – V_TT) for DDR III ⁽⁶⁾	I_OUT = 0 A	–30	0	30
		I_OUT = ±0.2 A	–30	0	30
		I_OUT = ±0.4 A	–30	0	30
		I_OUT = ±0.5 A	–30	0	30
I_Q	Quiescent Current ⁽⁴⁾	I_OUT = 0 A		320	500	µA
Z_VDDQ	VDDQ Input Impedance			100		kΩ
I_SD	Quiescent current in shutdown ⁽⁴⁾	SD = 0 V		115	150	µA
I_{Q_SD}	Shutdown leakage current	SD = 0 V		2	5	µA
V_IH	Minimum Shutdown High Level		1.9			V
V_IL	Maximum Shutdown Low Level				0.8	V
Iv	V_TT leakage current in shutdown	SD = 0 V V_TT = 1.25 V		1	10	µA
I_SENSE	V_SENSE Input current			13		nA
T_SD	Thermal Shutdown ⁽⁵⁾			165		°C
T_{SD_HYS}	Thermal Shutdown Hysteresis			10		°C

(1) At elevated temperatures, devices must be derated based on thermal resistance.

(2) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using Statistical Quality Control (SQC) methods. The limits are used to calculate Texas Instruments' Average Outgoing Quality Level (AOQL).

(3) VIN is defined as VIN = AVIN = PVIN.

(4) Quiescent current defined as the current flow into AVIN.

(5) The maximum allowable power dissipation is a function of the maximum junction temperature, T_J(MAX), the junction to ambient thermal resistance, R_θJA, and the ambient temperature, T_A. Exceeding the maximum allowable power dissipation will cause excessive die temperature and the regulator will go into thermal shutdown.

(6) V_TT load regulation is tested by using a 10 ms current pulse and measuring V_TT.