ZHCSO70A march 2023 – may 2023 LMR36501 , LMR36502
PRODUCTION DATA
- 1
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 Enable, Shutdown, and Start-up
- 8.3.2 Adjustable Switching Frequency (with RT)
- 8.3.3 Power-Good Output Operation
- 8.3.4 Internal LDO, VCC UVLO, and VOUT/FB Input
- 8.3.5 Bootstrap Voltage and VBOOT-UVLO (BOOT Terminal)
- 8.3.6 Output Voltage Selection
- 8.3.7 Soft Start and Recovery from Dropout
- 8.3.8 Current Limit and Short Circuit
- 8.3.9 Thermal Shutdown
- 8.3.10 Input Supply Current
- 8.4 Device Functional Modes
-
9 Application and Implementation
- 9.1 Application Information
- 9.2
Typical Application
- 9.2.1 Design Requirements
- 9.2.2 Detailed Design Procedure
- 9.2.3 Application Curves
- 9.3 Best Design Practices
- 9.4 Power Supply Recommendations
- 9.5 Layout
- 10Device and Documentation Support
- 11Mechanical, Packaging, and Orderable Information
8.3.1 Enable, Shutdown, and Start-up
The voltage at the EN/UVLO pin controls the start-up voltage and shutdown voltage of the LMR3650x. There are three distinct modes set by the EN/UVLO pin; shut-down, standby and active. As long as the EN/UVLO pin voltage is less than VEN-WAKE the device is shutdown mode. During shutdown mode, the input current drawn by the device typically is 0.5 μA (VIN = 13.5 V). The internal LDO regulator is not operational. When the voltage at the EN/UVLO pin is greater than the VEN-WAKE but less than VEN-VOUT the device enters the standby mode. In standby mode, the internal LDO is enabled. As the EN/UVLO pin voltage increases above VEN-VOUT, the device enters active mode starting the feedback resistor detection. After feedback detect is completed, soft-start functionality is released to slowly increases the output voltage and switching starts. To stop switching and enter standby mode the EN/UVLO pin must fall below (VEN-VOUT – VEN-HYST). Any further decrease in the EN/UVLO pin voltage below VEN-WAKE the device is in shutdown. The various EN/UVLO threshold parameters and their values are listed in Section 7.5. See Section 8.3.6 for information about feedback resistor detection. Figure 8-1 shows the precision enable behavior.
Figure 8-1 Precision Enable
BehaviorRemote precision undervoltage lockout can be implemented with this functionality as shown in Figure 8-2. See Section 9.2.2.9 for component selection.
Figure 8-2 VIN Undervoltage
Lockout Using the EN/UVLO Pin
The high-voltage compliant EN/UVLO pin can be connected directly to the VIN input pin if remote precision control is not needed. The EN/UVLO pin must not be allowed to float. The various EN threshold parameters are listed in the Section 7.5. Figure 8-1 shows the precision enable behavior. After EN/UVLO goes above VEN-VOUT with a delay of about 1 ms, the output voltage begins to rise with a soft-start and reaches close to the final value in about 2.58 ms (tss). After a delay of about 2 ms (tPGOOD_ACT), the PGOOD flag goes high. During startup, the device is not allowed to enter FPWM mode until the soft-start time has elapsed. Check Section 9.2.2.9 for component selection.